TORONTO -- A memory technology first developed in the 1960s is showing promise to meet the demands of the Internet of Things. Cypress Semiconductor recently announced it has developed functioning silicon cells using its SONOS (silicon oxide nitride oxide silicon) embedded Flash memory technology at the 55-nanometer process technology node in collaboration with Shanghai Huali Microelectronics Corporation (HLMC), a pure play wafer foundry in China.
Sam Geha, VP of Cypress’s IP business unit, says SONOS is well-suited for smartcards and IoT applications. The company has been working on SONOS for 16 years since acquiring it 1998. Although the technology was developed nearly 50 years ago, it’s found uses in some very modern applications, he says, including the original click-wheel iPod, touchpads for Tesla cars and other dashboards, and tablets.
Geha says Cypress’s 55-nanometer SONOS embedded nonvolatile memory (NVM) process offers significant advantages over other embedded NVM offerings, because it only requires three mask layers to insert it into a standard CMOS process (compared with the nine to twelve additional masks generally needed for other embedded Flash technologies). “We’ve improved the quality and reliability of SONOS with trap engineering improvement,” he says.
Mask reduction results in lower manufacturing costs, he says, which means SONOS does not alter standard device characteristics or models when it is added to the baseline CMOS process, thus preserving existing design IP. Aside from cost, another reason it’s well suited for IoT devices is that, unlike alternative two-chip solutions with a regular die and external flash, which require “leaky” SRAM, SONOS embeds flash in the chip so the SRAM is not required and the die area doesn’t grow, he says. It is also low power. Programming can be done at 7.5 volts.
Other features of SONOS include 10 years of data retention, 100,000 program/erase endurance cycles, and resistance to soft errors, says Geha. Cypress has already demonstrated the ability to scale SONOS to 40-nm and 28-nm nodes. He says floating gate technologies are harder to scale as the node is shrunk further.
Jim Handy, principal analyst with Objective Analysis, says SONOS was a technology that was initially not cheaper to make, but agreed that floating gate technology doesn’t scale as well. SONOS scales particularly well with NOR flash, he says. “SONOS is a whole lot simpler than a standard flash process.”
Cypress has the history with the technology to make it work, says Handy, but there are other technologies that meet might the demands of IoT, particularly power consumption, including MRAM, a technology first presented at industry conferences 25 years ago. Handy noted that Toshiba recently developed new STT-MRAM technology that can be used to enable MRAM-based cache memory for microprocessors. By replacing the traditional SRAM-based L2 cache on a processor with STT-MRAM, Toshiba believes CPU power consumption can be reduced by as much as 60%. Another technology is ferro-electric memory, he says. “It’s a problem a lot of people are trying to solve.”
Cypress announced it had licensed the technology to HLMC in January. It also licensed SONOS to semiconductor foundry United Microelectronics Corporation in July. UMC is focused on low power, highly integrated IC designs, such as IoT and wearables. The technology and design IP will be available for high-volume manufacturing by HLMC customers in the second half of 2015. Geha expects the IoT market will really take off in 2016-2017 with a wide array of devices.
Research recently released by Acuity Group suggests that while IoT awareness by consumers is low at the moment, adoption is inevitable. Currently, 7% of consumers own a wearable IoT device and 4% of consumers own an in-home IoT device. The study found that nearly two thirds of consumers plan to buy an in-home device in the next five years and that wearable technology ownership will double by 2015. By 2016, wearable technology is expected to double again and reach a total adoption rate of 28%.