TORONTO — Until recently, it was correct to say there was only one vendor actually shipping MRAM, but that could soon change.
Avalanche Technology is now sampling what is said are the industry’s first Spin Transfer Torque Magnetic RAM (STT-MRAM) chips. In an interview with EE Times, Avalanche’s VP of business development Michael Ofstedahl said the company has stayed quiet about its efforts for the most part because it wanted to wait until it had something that was commercially viable. To date, Everspin has been the only company in the MRAM space commercially delivering devices.
Ofstedahl said Avalanche chose the harder path from day one, opting to base its STT-MRAM memory on proprietary perpendicular magnetic tunnel junction (pMTJ) cells manufactured on a high volume, low cost, standard CMOS 300mm process. “If it was going to be commercially viable, it had to be on 300mm wafers using advanced lithography,” he said. “We didn’t want to be niche. It’s been tough to get the recipes down.”
Avalanche is sampling a 32/64Mbit stand-alone discrete STT-MRAM memory device with an industry standard SPI interface built on a 55nm-node foundry process. Ofstedahl said STT-MRAM is better suited for higher volume, cost-sensitive applications than in-plane MTJ MRAM technologies already sampling, and pMTJ cells combined with low cost 300mm production are critical to commercialization. “This is a huge step for us and the industry,” he said.
Perpendicular MTJ requires less real estate than STT-MRAM implementations with current generation in-plane MTJ (iMTJ) cell design, Ofstedahl said. iMTJ-based STT-MRAM does not scale well below 90nm nodes and is not cost competitive on 200mm wafers. “The in-plane version is too big. It’s not going to get into a device that's cost effective.” Because pMTJ-based STT-MRAM scales down to below 10nm, he said it can be cost-competitive with other memory technologies, making it a viable alternative for DRAM and flash in low- and medium-density applications.
In a typical STT-MRAM integration process, the MTJ resides between two metal layers requiring two additional masks. In the past, said Ofstedahl, processing relied on tools that were designed for the hard disk drive industry, but more recently, big equipment tools vendors in semiconductor manufacturing have developed the necessary deposition and etching tools needed for 300mm wafer processing. He said now there is an ecosystem in place for manufacturing STT-MRAM in high volume on 300mm wafers at less than 40nm.
Ofstedahl said Avalanche has a large portfolio of patents in pMTJ cell design, manufacturing, pMTJ operation, STT-MRAM circuit design and STT-MRAM integration at system level. He said the company’s progress to date was also made possible through its relationship with Canon Anelva, and also acknowledged Everspin’s success in validating the MRAM market, which Avalanche sees as a $35 billion opportunity. “There’s plenty of room for multiple players.”
Tom Coughlin, founder of Coughlin Associates, sees Avalanche further validating the market, specifically for STT-MRAM, which he said has enormous potential.
Last spring the research firm released a report predicting MRAM would see a boom through 2019. The power-savings from storing data without requiring power to be maintained to the circuits will drive annual MRAM and STT MRAM revenues to increase from about $190 million in 2013 to $2.1 billion in 2019, according to the report, "2014 Emerging Non-Volatile Memory & Storage Technologies and Manufacturing Report." It also predicted the demand for standalone MRAM components and embedded MRAM will drive a market for MRAM manufacturing equipment from an estimated $52.9 million in 2013 to $246.3 million in 2019. Coughlin is in the process of updating that research and anticipates releasing it next month.
He said there are a lot efforts around MRAM at semiconductor companies and sees a lot of different markets for both discrete and embedded MRAM. The characteristics of STT-MRAM would allow is to replace a great deal of SRAM, and as costs go down, DRAM as well. “The growth is actually going to be in the STT-MRAM because it opens of up higher performance and higher density applications than MRAM.”
For Avalanche, getting to this point is a huge milestone for the company, said Ofstedahl, with an ecosystem, customer demand, and product that will soon be fully evaluated and fully qualified. “We’re actually going to have a business instead of an R&D project.”
—Gary Hilson covers memory and flash technologies for EE Times and is the editor of Memory Designline.
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