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Globalfoundries Launches Own FDSOI Processes

7/13/2015 01:40 PM EDT
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michigan0
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This is my comments on GF press release by GF for the first FDSOI 22nm FDSOI.
michigan0   9/7/2015 7:45:30 PM
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Sang Kim
Press Releases by GF(GLOBALFOUNDRIES) for the first 
22nm FDSOI that "delivers FinFET- like performance and 
energy efficiency at a cost comparable to 28nm planar 
technologies". These are indeed awesome claims by GF. 
Lets take a close look.

About a decade ago IBM created International SOI 
Consortium and then faded away. GF bought IBM and 
now claims manufacturing its first 22FDX.

28nm bulk Planar is volume manufactured for many 
years by major semiconductor companies but not the 
28nm FDSOI yet. Why? Simply because LDD(lightly doped drain) can't be implemented in 28nm 
FDSOI for hot carrier reliability. Therefore, the hot 
carrier reliability is a real and critical issue for GF's 
22FDX that has a shorter channel length than 28nm 
FDSOI. Therefore, hot carrier reliability becomes 
significantly worse in 22FDX and must be addressed.

Two most critical issues with GF's 22FDX are 
manufacture-ability and scalability. My first question 
for GF's first 22FDX is, how thin the SOI thickness is 
required for 22FDX? My estimation is about 5nm but 
definitely not 6nm. It is extremely difficult to control 
depositing a 5nm or even 6nm SOI layer uniformly 
and reliably across 12" wafers at the manufacturing 
line. If not manufacturable, the debate is over.

How thin SOI thickness is required for 14FDX? Less 
than 4nm! Therefore, 22FDX is not scalable. It means 
that 22FDX would be the last node even if 22FDX 
were manufactured. Another critical issue that must 
be delt with 22FDX is how to suppress the leakage 
currents due to short channel effects. It seems the 
debate is over.

Other key issues are when Vg=0V and VD=1V are 
applied or 22FDX is off, how can you prevent the 
punch-through leakage currents in the un-doped 
very short 22FDX SOI channel.

When Vg=1V and Vd=1V applied on 22FDX or 
22FDX is on, a large number of electron and hole 
pairs are generated near the drain. Electrons flow 
to the drain but where the holes go? The holes go 
to the source through the un-doped SOI channel, 
forming a parasitic N+ source/holes(p+) diode  
at the source, resulting in large diode leakage 
current failures. Also, how you prevent DIBL(Drain Induced Barrier Lowering) in such short 
channel devices such as 22FDX?

It sounds the back-basing is a savior for 22FDX. 
Of course, forward back-biasing enhances the 
source injection currents resulting in high 
22FDX on-currents. However, how high back
biasing voltage is required in order to reach the 
source across the BOX? It means each 22FDX 
requires a very high voltage back-bias generator 
that is a very costly and impractical. That is why 
in my opinion the 22FDX can't be manufactured 
by GF.

In summary the 22FDX has four major critical
issues: 1) hot carrier reliability due to lack of LDD.
2) punch-through leakage current through the
undoped SOI channel. 3) unable to suppress
leakage current. 4) holes go to the source forming
a N+(source)/P+holes diode resulting in device
failure.
 








michigan0
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Re: Globalfoundries Laounches Own FDSOI Processes
michigan0   8/30/2015 3:58:27 PM
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Sang Kim


Sorry, I missed the 3 I-V curves of the FDSOI you posted 
last week. This is the first I-V curve I have seen.

First, Lg= 25nm is an abnormal node. I know Lg=28nm 
belongs to the bulk planar and Lg= 22nm belongs to 
Intel's FinFET. They are in mass production today. 

When Vd=1V and Vg=0V or transistor is off, how you 
avoid the punch-though currents in the un-doped 
SOI channel? When Vd=1V and Vg=1V, a vast majority 
of the generated holes due to impact ionization near the 
drain go to the source resulting in device failure due to the 
formation of the N(+)source and P+hole diode resulting in 
large leakage currents. That is why FDSOI is not 
manufactured today yet and will not be because of two 
critical issues: 1) punch-through currents and 2) the 
holes go to the source.  

Furthermore, the short channel effects can not be 
controlled by thinning the channel because you can't do 
thinning a 7nm channel in the manufacturing line. Also, 
28nm FDSOI has to resolve the hot carrier reliability 
because it doesn't have LDD(lightly doped drain) unlike 
28nm bulk planar and has an ultrathin 7nm SOI 
thickness. Can you control 7nm SOI thickness uniformly 
and reliably across 12" wafers at the manufacturing line? 
These are some of the critical questions against the FDSOI. 

If Samsung show the hot carrier reliability data, I totally 
agree with Samsung. The hot carrier reliability is very 
critical for FDSOI technology because LDD can not be 
implemented in FDSOI unlike the 28nm bulk planar.

 

AKH0
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Re: Globalfoundries Laounches Own FDSOI Processes
AKH0   8/27/2015 9:12:05 PM
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I showed the I-V characteristics of the FDSOI with the 3 sets of curves I posted last week (the 12 curves that you are not willing to see). For your convenience I am posting it again (It was actually shown at IEDM 2009, so you have already seen it anyways).

Could you please point out what is wrong in this curve at Vd=Vdd and Vg=0? Ioff is 300pA/um and is actually less than both planar and FinFET I-Vs I had for comparison.

Short channel effects are controlled by thinning the channel in FDSOI. There is no need to doping to avoid punchthrough in the exact same manner that an ideal FinFET does not need doping in the channel (well FinFET needs doping for other reasons). 



This is a slide Samsung showed last week. If I accept your claims, it means they are lying. Sorry, but between your credentials and Samsung's I have to accept their words over your! 

https://www.semiwiki.com/forum/attachments/content/attachments/15105d1440096654-sam7-jpg

 

 

 

michigan0
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Re: Globalfoundries Laounches Own FDSOI Processes
michigan0   8/27/2015 7:30:11 PM
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Sang Kim


First, please show such I-V curves supporting your claims. 
Sorry, I haven't seen such I-V curve yet. Exactly what is 
your claim for FDSOI technology? In my opinion the 
biggest issue with FDSOI is punch-through of the un-doped FDSOI channel, not GIDL when drain=Vdd, gate=0V 
is applied. How do you prevent the punch-through in an un-doped SOI channel? Doping the un-doped channel? 
Therefore, FDSOI is not manufacturable.

The 28nm bulk planar is volume manufactured for many 
years by major semiconductor companies including 
Samsung but who is manufacturing 28nm FDSOI today 
including Samsung? I doubt that Samsung offers 28nm 
FDSOI. Here is an another process reason beside the 
punch-through. Depositing an ultrathin 7nm SOI film 
required for 28nm FDSOI uniformly and reliably across 
12" wafers at the manufacturing line is extremely difficult 
or not doable. That is why 28nm FDSOI is not 
manufactured today yet and will not be unlike the 28nm 
bulk planar.

AKH0
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Re: Globalfoundries Laounches Own FDSOI Processes
AKH0   8/26/2015 12:48:11 AM
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I don't "say" that FDSOI has lowest leakage. I "show" data that supports my claim. Please take a moment and see the I-V curves I presented.

Exactly because FDSOI has undoped channel it offers lowest possible GIDL, because in the off state (drain=Vdd, gate=0) it has the lowest lateral electric field at the drain side of the channel.

Here is yet another link from Samsung.

http://www.samsung.com/semiconductor/insights/article/20675%20

YES. They offer 28nm FDSOI and they don't need LDD.

michigan0
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Re: Globalfoundries Laounches Own FDSOI Processes
michigan0   8/26/2015 12:37:34 AM
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Sang Kim

You say that the FDSOI device has the lowest leakage. 
But I don't see why FDSOI has the lowest leakage. 
Please show why. The 28nm FDSOI has an un-doped 
channel and doesn't have LDD(lightly doped drain) 
unlike the 28nm bulk planar. How the 28nm FDSOI 
cope with hot carrier issues? Where the holes go?Holes go to the source. What happens when the holes 
go to the source? See my previous posts here at 
EETimes. That is why the 28nm bulk planar is 
manufactured for several years but not even the 28nm 
FDSOI yet.


Samsung is a very prestigious semiconductor company 
but I don't agree that Samsung is offering 28nm FDSOI 
unless Samsung 28nm FDSOI has LDD just like the 
28nm bulk planar for hot carrier reliability. I doubt it.


Furthermore, the 28nm FDSOI is not scalable. What 
ultrathin SOI layer is required for 22nm FDSOI? About 
6nm. Depositing 6nm ultrathin SOI layer uniformly and 
reliably across 12" wafers at the manufacturing line is 
extremely difficult or not possible. Therefore, FDSOI is 
not manufacturable.

 

 

 

AKH0
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Re: Globalfoundries Laounches Own FDSOI Processes
AKH0   8/25/2015 1:31:08 PM
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YES. It is very critical that you see there are 12 curves representing 3 different technologies and among them actually the FDSOI device has the lowest leakage. If you cannot see the electrical evidence (or are not willing to see it) there is no point in the discussion.

The top layer is not deposited, it is transferred to the handle Si wafer using the smart cut process. All major SOI suppliers know how to this and deliver 12" wafers with less than +/- 5 Angstrom uniformity across wafer and from wafer to wafer.

As I pointed out, Samsung is offering 28nm FDSOI as a foundry. If their claim based in their website and presentations is not convincing there is nothing much I can offer.

 

 

michigan0
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Re: Globalfoundries Laounches Own FDSOI Processes
michigan0   8/25/2015 1:28:19 PM
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Sang Kim


Hi AKHO, lets be more realistic. It is immaterial how many 
curves you have. The critical problem with FDSOI is its 
manufacture-ability due to unable to suppress leakage 
current even at 28nm node. That is why FDSOI is not
manufactured yet for several years by major semiconductor 
companies even at 28nm node unlike 28nm bulk planar. 
This is because it is extremely difficult depositing an 
ultrathin 7nm SOI layer required for 28nm FDSOI 
uniformly and reliably across 12" wafers in the 
manufacturing line. Bulk planar also will ends at 28nm 
node also due to unable to suppress leakage currents at 
22nm node. I am total agreement with your browser issues. 
However, what I am most interested here, I am sure including 
readers of this post, is to see FDSOI is manufactured at 
least at 28nm node. But it is not. What can you do if FDSOI 
is not manufacturable. That is the end of the story or debate 
is over.  

AKH0
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Re: Globalfoundries Laounches Own FDSOI Processes
AKH0   8/23/2015 4:55:59 PM
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There are 12 curves because I put data from 3 papers (bulk planar, FinFET, and FDSOI) next to each other. Your browser might not show it correctly, but you can save picture and open it somewhere else if you really wanted to see the data. I insist that you do so before making a comment because otherwise there is no point in showing more data. Once you see 3 pairs of devices (total of 12 curves) and point to where exactly you see an abnormality in the FDSOI curves, I'll be more than happy to provide any data you want.

michigan0
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Re: Globalfoundries Laounches Own FDSOI Processes
michigan0   8/23/2015 4:11:07 PM
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Sang Kim

Please calm down a bit. There are total eight IV
corves, not twelve curves including both linear and
saturation currents. Where did the four additional
curves come from? You sound like my boss. I
commented on FDSOI but you didn't pay attention
to it. You sound not even looking at it. You say, do
this or do that. You are not my adviser. As you know,
IEDM stands for International Electron Device Meeting.
Yes, I ask I-V data, what else? The system data at IEDM?

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