TOKYO – We’ve all heard enough about the 20 to 50 billion connected devices that are supposed to flood the market by 2020. On one hand, the big numbers expected for the emerging Internet of Things (IoT) market have stirred hope in the semiconductor industry. On the other, many chipmakers are feeling IoT fatigue before the promised market is born.
Sanjay Jha, CEO of Globalfoundries came to the Shanghai FD-SOI Forum last week, and told the audience that it’s time for the industry to define IoT. More important, he said that the industry must develop realistic strategies to meet the technical requisites of IoT devices.
Among a surfeit of theories, predictions and technology horse-race stories on IoT, it’s time to hear from someone who has actually done the due diligence, made design choices and developed his own new IoT chipset.
Meet Satish Bagalkotkar, CEO, Synapse Design. He came to Shanghai last week attending the same conference where Jha was a keynote speaker. Bagalkotkar came to speak of his own IoT chipset design. He defines IoT devices as “almost free,” with a multi-year battery life and a very small foot print while featuring “world-wide connectivity.”
Following these parameters, he sought 18 months ago a chip solution to enable a sub-$5 finished product, with average power consumption at less than 100uA.
“We wanted to make sure that the IoT device survives on a coin battery,” said Bagalkotkar. The module had to be “inconspicuous,” as it is there to track location, temperature, pressure and other data, he said. The design goal was also set to enable worldwide connection via LTE.
The solution the Synapse’s team came up with is a full-LTE chipset consisting of sensors, modem ASIC and RF ASIC.
The chip set demands “smart architecture, process technology for extreme low power, efficient software and firmware and LTE compliance,” he concluded.
The crux, though, is that the chipset must meet two opposite requirements. On one end, it must consume “little to no power,” while on the other, it requires high frequency.
Synapse Design's full-LTE chipset dedicated for IoT
(Source: Synapse Design)
The biggest challenge for its modem ASIC is that it must achieve “extreme low leakage when in standby mode.” Bagalkotkar said, “We realize that standby power consumes most of the energy.” That implies that an “always ON” block with state retention is necessary and standby current less than 10uA, he explained.
Equally important in the modem ASIC is to enable high CPU MIPS in active mode. Bagalkotkar explained that LTE signal processing and protocol stack demand clocks of 300+MHZ, to ensure peak transmission power. Other requirements include low execution latency and minimizing dynamic power.
Synapse Design looked at a few different technology options to achieve these goals. The process options they examined included: 40nm LP, 28nm Bulk and 28nm FD-SOI. It’s important to note that Synapse is an experienced design service company with no specific allegiance to one process technology over another.
Among the three options, why is 40nm LP even an option?
Beyond Synapse, other vendors have wondered if they could get away with a low-cost 40nm LP to enable IoT devices. When EE Times talked to Megachips, CEO Akira Takata was also considering 40nm LP as an option for its IoT devices.
Bagalkotkar said, “40nm LP’s low mask cost could be attractive.” However, he noted that 40nm LP falls short of the performance requirement for an IoT device he had to design. More specifically, it doesn’t offer high dynamic power. Its vdd (voltage drain drain) range is limited and its die size is too large.
The Synapse team also looked at 28LP bulk. Its high performance, small die and low dynamic power make 28LP bulk a good option. But it was rejected as a viable option for IoT devices because of its “higher standby power,” said Bagalkotkar, along with limited low vdd operation.
Synapse in the end chose to go with 28nm FD-SOI. The process technology met all prerequisites, including high performance, small die, low dynamic power, very low standby power and wider vdd range, said Bagalkotkar. Body biasing further optimizes lower standby power, he added. Its only drawback? "No well known FD-SOI-based products in the market yet," he said.
Synapse, currently working with ST, used a 28nm FD-SOI process at Samsung for the baseband modem ASIC. It opted for 65nm node at TSMC for its RF ASIC. Bagalkotkar told EE Times that the RF chip has taped out and the baseband chip will be taped out in a few weeks.
Synapse’s IoT chipset is designed for an M2M device. Its LTE connection complies to LTE CAT 3 Release 9. The purpose for this particular M2M device is to take sensor data and send it directly to the cloud.
Bagalkotkar is not disclosing the name of the company who will be using his IoT chipset. The company is still “in a stealth mode.” He explained that the chipset can be used to connect “a wide range of sensors including temperature, pressure, location, humidity and others,” with the first release featuring GPS, location tracker.
Bagalkotkar indicated that the system company has been developing various business models for M2M devices. This includes “giving M2M devices for free but making money on monthly usage charges.”
— Junko Yoshida, Chief International Correspondent, EE Times