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Apple’s A9: Story Within A Story

11/12/2015 01:34 PM EST
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Daniel Payne
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Minimum Feature Size
Daniel Payne   1/7/2016 9:01:15 PM
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A long time ago the silicon process node naming did correlate to something physical, however with FinFET processes like a 14nm or 16nm node the numbers don't refer to anything physical like a minimum feature size, rather it is a marketing phrase now. Just a geeky clarification to an excellent article.

sixscrews
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The Woz Device
sixscrews   11/14/2015 11:11:00 PM
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Nice article - afraid I'm not qualified to understand all the sillycon stuff.

But I do remember Apple building the Apple ][ disk drive interface based on the 'Woz Device' - not something from Western Digital or one of the other king/queens of the drive decoder heap of the time (1976-77?) but based on a home-brew disk decoder cooked up by none other than Mr. Steve Wozniak hisself - hence, the 'Woz Device.'  It was a basic serial decoder part that took NRZ data from a floppy interface and turned it into a string of bits that could be interpreted as binary data from an external storage device - in this case, a floppy disk.  Nice if you can do it- and nobody besides you had to read your disks.  Problem was, WD and others rapidly slid down the price/performance curve while the Woz Device was stuck in 197? in term of parts count and interface components for the associated disk hardware.  Apple got stuck in 197? with respect to profitability of its floppy disk devices while everyone else ran ahead.  OK if you have a product that fools many people to pay premium bucks for.  But that doesn't work in 2015: the number or fools has increased but the percentage of fools in the marketplace has dropped.  Hence your market share decreases and your price has to increase proportionally.  Somethings got to break sometime.  Nice graphics aside, I would not bet on Apple in any situation - they are stuck with proprietary technology while the world is racing ahead with whatever works better, faster, stronger.

wb/ww

Paul Boldt
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Re: 32nm normalisation is not correct
Paul Boldt   11/14/2015 12:43:30 PM
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Thanks.  It will certainly be interesting to see the die and see how it comapres to the A9.

Paul Boldt
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Re: Any comments by Paul Boldt
Paul Boldt   11/14/2015 12:19:13 PM
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The primary kernel in the article is the continued push in design and milestones that have been achieved along the way.  The reference of Google's reported discussions suggests others are watching.  A further thread is to consider how Apple may be achieving Steve's original goal of differentiation through semiconductor design.  The normalized numbers are intended to support the above by considering what real estate is made available for design with process shrinks.  With regard to this latter point; thanks for the suggestion as to a FinFET scaling v. a "standard" planar shrink.

sranje
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Any comments by Paul Boldt
sranje   11/13/2015 7:20:58 PM
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Excellent article - thank you.  Several readers made comments about normalization to 32nm.  It would be great to hear author's comments

Many thanks in advance

hchan2n
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Re: 32nm normalisation is not correct
hchan2n   11/12/2015 9:01:51 PM
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A9X is said to be dual-core.

witeken
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Re: 32nm normalisation is not correct
witeken   11/12/2015 4:40:11 PM
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Exactly, this is very importanty. If one wants to normalize for process node, one has to compare the ACTUAL feature sizes of the process nodes, i.e. the interconnect pitch multiplied by the gate pitch for some real area number (area is not a linear number like 14nm). When you do that, you get something like this:

 

http://farm9.staticflickr.com/8125/15650137820_be301f008c_b.jpg

TechJunkie4Life
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Logic Detailed Structural Analysis Report of the TSMC 16 nm finFET Process found in the Apple A9 Processor
TechJunkie4Life   11/12/2015 3:53:47 PM
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More about the A9 Processor here with high-res images

http://www2.techinsights.com/l/8892/2015-09-28/zxx9c

Don Scansen
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Apple Strategy
Don Scansen   11/12/2015 3:11:43 PM
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Thanks for this in-depth look at Apple's processor history and strategy.

tpfj
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32nm normalisation is not correct
tpfj   11/12/2015 2:34:47 PM
The move to finFET does not give the area scaling you expect. Your 14nm extrapolation is giving too much credit to Apple's ability to integrate.

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