REDWOOD SHORES, Calif. – It’s early days for RISC-V -- an open specification seen as a Linux of microprocessors. On its long to-do list, engineers still need to define basic pieces of the instruction set architecture including its memory model, how it will speak to the external world of I/Os and how to debug it.
Many of the about 150 developers who signed up for the third RISC-V workshop volunteered to start a handful of working groups to address the most pressing issues in fundamental areas including security, virtualization and compliance. Proponents said the effort has taken the vanguard of the open source hardware movement, attracting leaders of earlier OpenCore and OpenRISC efforts.
The LowRISC project at the University of Cambridge is attracting interest as the likely first source of real development hardware. The team which includes members of the Raspberry Pi project hopes to have first silicon this year and plans to make development boards available in 2017, likely for $50-100.
The first of several planned LowRISC chips will tape out before the end of the year, a 9mm2 28nm part that fits in BGA package. It will use four cores running at more than a GHz with 512 Kbytes L2 cache and a 32-bit LPDDR3 memory controller. The group ultimately aims to deliver a low-cost board made completely with open source digital logic.
LowRISC expects to use up to four RISC-V cores at Raspberry Pi prices. (Image: Cambridge University; All pictures courtesy Krste Asanović)
Until LowRISC is available, developers will work with a handful of emerging system simulators and soft cores mainly implemented in FPGAs. One engineer said he is 80% done with a QEMU emulator for RISC-V that could be completed in two weeks.
Such tools will be key for the biggest job ahead, creating a software ecosystem for RISC-V. Ports of a handful of Linux variants including FreeBSD are well underway as are other low-level components, but ports of more widely used RTOSes and Android are more than a year away.
Ultimately, the effort must attract the broader world of applications developers if it is to become commercially significant. “We need more developers and more documents and specifications to reduce their startup costs,” Arun Thomas, an R&D engineer at BAE Systems told attendees.
So far, 48 individuals from seven universities and companies including BAE, Bluespec, Google, LG Electronics and Vectorblox have made software contributions to RISC-V on GitHub. Thomas rattled off a laundry list of needs ranging from specs for direct-memory access, an I/O memory management unit, performance counters, an applications binary interface, bootloaders, hypervisor and security extensions as well as the kind of detailed programming guides ARM provides its users.
“There’s a fair amount of work ahead just on the spec side,” Thomas said.
A basic port of FreeBSD was created from scratch with 25,000 lines of fresh code written in the last six months, reported Ruslan Bukin, a researcher at the University of Cambridge. This year the group aims to add support for multicore architectures, floating point units, Ethernet drivers and expanded virtual addresses.
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