TORONTO—The JEDEC Solid State Technology Association recently announced the publication of a new standard to enable higher memory performance in the graphics and specialty markets.
The JESD232 Graphics Double Data Rate (GDDR5X) SGRAM standard is designed to meet the increasing need for more memory bandwidth in graphics, gaming, compute, and networking applications, according to Micron's Michael Richter, who helped develop the standard under the auspices of JEDEC.
In a telephone interview with EE Times, he said the new standard was derived from the widely adopted GDDR5 SGRAM JEDEC standard, which initially came out in 2008. The goal was to provide a smooth transition to the new standard given the existing investment in GDDR5 while at the same time providing performance improvements over its predecessor that will help enable the next generation of graphics and other high-performance applications.
JEDEC wanted to leverage the existing ecosystem for GDDR5 so that it wasn't a radical change, said Richter. For example, it will be an easy transition from GDDR5 to GDDR5X for target applications such as network gear. “It's not a radical change. A major goal by JEDEC was to make as few changes as possible," he said. That's why the new specification isn't dubbed GDDR6 or 7.
GDDR5X specifies key elements related to the design and operability of memory chips for applications requiring very high memory bandwidth, targeting data rates of 10 to 14 Gb/s, which is double that of GDDR5, said Richter. However, it uses the same, proven pseudo open drain (POD) signaling as GDDR5 to allow for a smooth transition from its predecessor. “Over time we figured out we can run this memory a lot faster."
DDR memory always has limits, said Richter, but there was still demand in the industry for higher speeds and discrete graphic DRAM. “We had to do something to provide higher bandwidth for the future and overcome those limits."
GDDR5 is based on DDR3 SDRAM memory, which has double the data lines compared to DDR2 SDRAM. GDDR5 also uses 8-bit wide prefetch buffers similar to GDDR4 and DDR3 SDRAM. Richter said like the transition from DDR2 to DDR3, the primary change from GDDR5 to GDDR5X is the amount of data that is pre-fetched is doubled. “It allows us to explore much higher bandwidth, which we believe is possible."
Compared with DDR3 and DDR4, GDDR5 is a niche memory, said Richter, but has potential to grow. “There is still an appetite for higher bandwidth that JEDEC wants to solve with the GDDR5X standard."
A year ago, Samsung Electronics announced it had begun mass production of 8 Gb GDDR5 memory chips based on a 20 nm fabrication process. Last August, Micron announced the availability of its 8Gb GDDR5. In line with its 4Gb GDDR5 offering, the 8Gb product provides the bandwidth required for graphics applications. The company said it formally announce the launch of a new graphics memory solution with data rates targeting 10–14 Gb/s sometime in 2016.
—Gary Hilson is a general contributing editor with a focus on memory and flash technologies for EE Times.