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IBM Neurocomputer Detailed

TrueNorth innards, aspirations revealed
4/7/2016 09:58 AM EDT
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realjjj
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realjjj   4/7/2016 12:29:32 PM
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To clarify, i'm thinking 2020 and beyond. Do they like something like TFET , do they have a path to monolithic 3D that might by hindered by the choices the foundries are likely to make? I just wonder if very efficient neuromorphic chips or GPUs won't be much delayed if the focus is on single threaded perf and area instead of parallelism and efficiency.

R_Colin_Johnson
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R_Colin_Johnson   4/7/2016 12:13:54 PM
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Yes, Samsung is a perfect fit right now. IBM is not worried about the absolute highest density but absolute lowest power. But I've sent queries out to them so we'll see what they have to say for themselves soon (I hope).

AKH0
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AKH0   4/7/2016 11:55:16 AM
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Yes, this was a 28LP at Samsung. The architecture cares about higher neuron density and very low activity factor. That requires highest density SRAM and lowest leakage. At the time of implementing the chip, 28LP was the best for this purpose. A 28FDSOI maybe with reverse body bias, would have been a natural next step. IBM's own 14nm FinFET (not competetive in density and not caring about leakage as much) and even foundry FinFET that are mostly optimized to lower active power are not the right choice.

The design is fairy modular and forgiving in terms of defects (the way it should be to mimic brain anyways), so 3D integration should be feasibly. Whether TSV gives the enough density or need a monolithic integration is debatable.

R_Colin_Johnson
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R_Colin_Johnson   4/7/2016 11:33:19 AM
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Well they seem to be happy with Samsung's 28 nm low power process, but I will querey them on you more detailed questions and see what they say. Stay tuned.

realjjj
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realjjj   4/7/2016 11:18:15 AM
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Would be curious to hear what they want from the process. What type of FET, what do they need to go 3D and if the foundries choosing a high perf path will make their progress slower than it needs to be.

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