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10nm DDR4 DRAM Could Defy Moore

4/7/2016 02:00 PM EDT
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resistion
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Re: cost
resistion   4/11/2016 6:08:53 AM
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My understanding is that Samsung uses the HCS spacer process, as detailed in last year's IEDM. This process is very aggressive in scaling, each time it's used reduces 2D pitch 42%. So they can go from 18 to 10 nm with no additional masking, only an extra iteration. I don't think scaling cost is an issue, as much as possibly less reliability of smaller device.

resistion
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Re: cost
resistion   4/8/2016 7:46:30 PM
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I wouldn't be too surprised with a higher initial price. But it looks like they are gearing for lower prices.

alex_m1
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Re: cost
alex_m1   4/8/2016 4:38:35 PM
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Resistion, in some other place they talk abuot a "double digit" price decrease.

realjjj
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not 10nm
realjjj   4/8/2016 1:48:47 AM
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They use the term "10nm class" but it is 18nm.

resistion
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cost
resistion   4/7/2016 8:23:23 PM
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Is it cheaper than previous DRAM?

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