LAKE WALES. Fla.—Intel's 72-processor Xeon Phi now boots stand-alone, rather than as a coprocessor, to tackle any multiprocessing task—especially brain-like deep learning and artificial intelligence (AI). Intel says the bootable Xeon Phi scales to any number of processors using Intel's scalable-system framework (SSF) with integrated on-chip fabric, Omni-Path fiber and silicon photonics. Speed was bumped to 1.5-GHz for high-performance computing (HPC) orchestration while maintaining its low-power energy budget compared with GPU-based and other competing high-speed multicore arrays tied to PCIe, according to Intel.
"The Xeon Phi is the world's first CPU with integrated fabric in-package," Charles Wuischpard, vice president of the Data Center Group and general manager of the HPC Platform Group told EE Times. "The Xeon Phi is now bootable by itself, has integrated in-package memory and can run on systems as small as developer workstations starting at $5k. It has also achieving a world record one-socket SPECfp benchmark."
Intel's bootable Xeon Phi fits into its scalable system framework (SSF) which connects with omni-path fiber driven by silicon photonics, to perform high-performance computing (HPC) tasks, especially Deep Learning algorithms (starred).
He also claimed that Xeon Phi arrays of were 1.38 times faster than GPUs (based on 32-nodes running GoogLeNet deep learning image classification compared with a single Intel Xeon Phi processor with 87 percent efficiency compared to 32 NVIDIA Tesla K20 GPUs with 62 percent efficiency*). In a 128-node array, the Xeon Phi was claimed to perform Deep Learning 50 times faster than GPUs (based on a GPU running AlexNet*.
To maximized its yields on the complicated Xeon Phi chip, Intel has gone to testing and binning them for 64-to-72 processors running at 1.3-to-1.5 GHz in four SKUs (stock-keeping units, see figure). The tie that binds the multi-processors together—especially when configured in multi-chip arrays—is Intel's scalable system framework. SSF makes use of the Xeon Phi's on-chip fabric to connect any sized array of multi-processors with Intel's OmniPath fiber and silicon photonics.
"Besides Xeon Phi fabric, SSF also offers interoperability, design validation, and successful HPC. It can also perform many other datacenter business analytic tasks, such as machine learning and artificial intelligence," Wuischpard told us. "Thousand of researchers are working on neuromorphic [brain-like] solutions in many other areas besides just the one deep-learning app Google is boring on."
Xeon Phi Knights Landing integrates optical fabric (left) and 16-Gbyte of 3-D memory (right) onto systems starting as small as a single-processor board (center).
The latest Xeon Phi now has 16-Gbyte of in-package memory with 500-Gbyte per second sustained bandwidth as well as up to 384-Gbyte paths to off-chip double-data-rate (DDR4) memory. It also has dual ports to Omni Path fiber and on-chip 512-bit parallel advanced vector extensions (AVX-512). Intel predicts sales of 100,000 Xeon Phi units in 2016 to more than 50 original equipment manufacturers (OEMs), independent software vendors (ISVs) and middleware partners.
Xeon Phi's are not cheap, but do offer a variety of price points from 64- to 72-processors per chip which also maximizes Intel's yield.
The Xeon Phi is also compatible with Intel's OpenHPC "Orchestrator"—a software stack built to ease the coordination of large multi-processor arrays for highest performance and scalability (available later in 2016).
Wuischpard said the Xeon Phi would be on its own separate two-to-three year update plan, not the yearly release schedule that the other Cores and Xeons were on. He also promised "big announcements on silicon photonics shipping in volume later this year."
— R. Colin Johnson, Advanced Technology Editor, EE Times