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IBM, Samsung Put New Spin on MRAM

11-nm spin-torque readied
7/7/2016 09:00 AM EDT
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R_Colin_Johnson
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Re: Lots of spread in data
R_Colin_Johnson   7/14/2016 9:33:03 AM
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Good point. Of course, IBM wants to draw the most optimistic conclusions and work toward realizing them in generation two. Having Samsung on-board can't hurt, but only time will tell.

resistion
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Lots of spread in data
resistion   7/14/2016 8:39:51 AM
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Looking over the IEEE Magnetics Letter, I was struck how much spread in the key parameters, like resistance and activation energy. You can draw whatever conclusion you want, it's within the range.

resistion
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Re: Replacing DRAM to Flash
resistion   7/10/2016 2:39:18 AM
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Okay. Read bit error rates must be much lower than write, if it is being read more than being written, as the case for flash storage.

R_Colin_Johnson
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Re: Replacing DRAM to Flash
R_Colin_Johnson   7/9/2016 9:03:12 AM
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Good points. I think IBM meant in order to measure the write-error-rate they had to read the bits too, so proved it as a matter of course. Not sure what the read current was, but I believe production models will use higher currents than their test cases--this research was to see how low they could go and still maintain reliability.

resistion
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Re: kidding
resistion   7/8/2016 11:19:54 PM
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There's a reason NAND flash read current at 1uA is considered slow. If read bit error rate is not important, it's hard to trust all those endurance cycle reads.

resistion
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Re: Replacing DRAM to Flash
resistion   7/8/2016 11:16:48 PM
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IBM must have thought I was referring to write bit error rate. I was referring to disturb or read bit error rate. In other words, read current cannot be too close to write current. 7.5 uA write current is already small.

R_Colin_Johnson
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Re: Replacing DRAM to Flash
R_Colin_Johnson   7/8/2016 5:49:06 PM
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Yes, that would be a interesting graphic, since most of IBM's new technologies are experimental--such as  nanotube and graphene transistors. This one, however, already has a foundry partner and a three year countdown. Yes, IBM has one of the world's thickest portfolios of patented semiconductor technologies--not all of which make it to manufacturing--but spin-transfer torque MRAM is all but a sure thing, with Micron, Toshiba and many others prepariing similar "universal" memory technologies.

Mr. FA
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Re: Replacing DRAM to Flash
Mr. FA   7/8/2016 4:08:24 PM
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Appears to be more IBM innovation vaporware.   I applaud their spirit, but wish they would make announcements when they actually had a product ready for the market.  I echo AKH0's comments.

It would be intriguing to research and prepare a table listing each of the IBM technology innovations announced on EETIMES over the past 20 years (about 2-4+ per year?), and then identify the product (if one ever was made) which used the actual technology.   

  

 

 

R_Colin_Johnson
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Re: kidding
R_Colin_Johnson   7/8/2016 12:56:05 PM
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IBM says you are wrong about this point too, because advanced sense amp designs do allow sensing at these low currents. Whether you would go as low as 7.5uA for the write current in a production model is debatable, according to IBM, but it says the point is that the device physics still work at these dimensions and low currents, with reliable writing all the way down to as low as you could possibly want the write current to be.

Yes the thermal stability needs to be improved, as mentioned as of its goals in the paper, but their point was that this is the first time it was possible to achieve both low write error rate at low current, for any value of thermal stability.

The read-error-rate is at least as good as 7e-10, as stated in the paper, since otherwise read errors would have affected the write-error-rate measurement. In general, read-error-rate is not the limiting problem with MRAM, but write-error-rate is. Good read-error-rates were demonstrated many years ago, according to IBM. However, good write-error-rates at these low currents have never been demonstrated before, according to IBM.

R_Colin_Johnson
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Re: Mixed signals?
R_Colin_Johnson   7/8/2016 12:49:43 PM
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In its paper IBM did not suggest stacking it in 3D, but they did say in the paper that its thermal stability is too low and needs to be improve. However, IBM says the point is that this is the first time it was possible to achieve such a low write-error-rate at such a low current, for any value of thermal stability.

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