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ASML Invests $1.9B in Next-Gen EUV

High NA systems expected about 2024
11/3/2016 03:01 PM EDT
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rick merritt
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Re: 35nm
rick merritt   11/4/2016 12:15:52 PM
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@witeken The 35nm feature size was a rough estimate from ASML of typical minimum feature sizes that might be seen in today's production 16/14nm FinFET processes.

witeken
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35nm
witeken   11/4/2016 10:07:55 AM
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"Today's most advanced chips have feature sizes as small as 35nm"

Which feature size are you referring to?

Edit: BTW, about the cost, the NXE:3400b has a price tag of $105M associated with it, although I believe customers might get a price reduction if they order multiple ones: that's likely why Intel made a commitment for 15 systems at once.

Also, we'll have to see if those WPH numbers come true.

resistion
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Scanners not the whole story
resistion   11/3/2016 7:37:47 PM
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Actinic inspection and pellicle still show stoppers. It is estimated they cannot make enough 3400 for HVM before high NA development comes into play. The field size needs to change.

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