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TSMC, Samsung Diverge at 7nm

TSMC's 7nm SRAM sees "healthy" yields
2/8/2017 00:01 AM EST
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resistion
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The waiting rule
resistion   6/20/2017 12:21:25 AM
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The general rule for coming in late on a node, is that you need to come in with higher density. For this reason, Samsung needs to bring in the 8LPP and Intel is bringing in the SAQP and even GlobalFoundries may be scaling aggressively. But generally they will aim to leave TSMC with the least dense 7nm, even with its projected 7nm+ case.

rick merritt
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Re: ....
rick merritt   2/9/2017 2:13:11 PM
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FWIW Scotten Jones did a great job decoding the reality behind the marketing of node names i a presentation at ISS in January we covered here:

http://www.eetimes.com/document.asp?doc_id=1331185

 

Doug_S
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Re: ....
Doug_S   2/9/2017 1:54:44 PM
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I'm skeptical of that - why would Intel re-brand their nodes? Foundry customers are (I should hope!) educated enough to not care about that, but only the power/performance/area characteristics of the process. Besides, if such a marketing driven decision was made, what stops TSMC from doing a tweak of their 7nm and calling it 5nm, and renaming their 5nm as 3nm to stay one step ahead?

The numbers are meaningless for everyeone as it is, it isn't like Intel's 14nm process actually has any anything measuring 14nm. Nowadays the numbers just denote equivalency to historical process nodes when 180nm actually meant something was 180nm. Does it really matter if you achieve scaling to double the number of transistors per sq mm by shrinking the gate width by sqrt(2) or by using a different type of transistor structure with a smaller footprint for the same gate width?

Left5
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Re: ....
Left5   2/9/2017 10:37:29 AM
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"Of course their 10nm is roughly equal to Intel's 14nm, and their 7nm roughly equal to Intel's 10nm, so a lot of it is marketing driven."

I heard that Intel was thinking of rebranding their nodes for this reason. I.e. they would relabel "7nm" to "5nm".

vharihar
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Re: ....
vharihar   2/8/2017 11:06:47 PM
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Must be a typo error. Bit cell area cant be mm2. It must be um2 (sq. microns).

Doug_S
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Re: ....
Doug_S   2/8/2017 6:19:03 PM
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Yeah I think they meant to say using 10nm for this year's iPhone (presumably called iPhone 8) and 7nm for next years (iPhone 8S?)


Of course their 10nm is roughly equal to Intel's 14nm, and their 7nm roughly equal to Intel's 10nm, so a lot of it is marketing driven. But they will have caught up to Intel who are scheduled to ramp their 10nm at around the same time TSMC ramps 7nm.

AKH0
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AKH0   2/8/2017 2:30:21 PM
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And based on the picture above, part of it is coming from transition from 2-fin PD to 1-fin PD.

portalplz
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Area scaling
portalplz   2/8/2017 12:41:38 PM
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"The resulting SRAM macro will be 0.34x smaller than TSMC's 16nm version". This reads like TSMC's 7nm is only 34% "smaller" than its 16nm. The 7nm area scaling should be 0.34x or 34% footprint of 16nm.

Arnaud
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Re: ....
Arnaud   2/8/2017 4:36:54 AM
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bit-cell area of 0.027mm2

 

Seems rather big for a 7 nm node.

realjjj
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....
realjjj   2/8/2017 1:06:28 AM
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"TSMC started making in volume 10nm chips this year for the iPhone 7 and needs to ramp 7nm chips for the iPhone 8 next year."

Hehe you got carried away a bit there. The iPhone 7 is using 16nm and the next one will use 10nm later this year.

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