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TSMC Tips 7+, 12, 22nm Nodes

Advances push into 3nm, machine learning
3/16/2017 11:10 AM EDT
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rick merritt
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Re: Oh boy, they poked the bear
rick merritt   3/21/2017 2:45:01 PM
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Yes ULP is ultra low power

In three hours of presentations I only saw one slide comparing TSMC 22 to GF 22 and it went by too quickly for me to get any detail. Unfortunately TSMC forbids taking pictures.

 

 

emesdoublee
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Re: Oh boy, they poked the bear
emesdoublee   3/20/2017 9:59:35 AM
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Right, I understand this is a foundry output number for all foundries. You have to agree this is pathetic volume at 10K wafers per month.

What I would like to know is what is the PPA comparison between TSMC 22 ULP and FD-SOI 22. Did they say this will be similar? If so, FD-SOI 22 is toast.

I assume ULP means ultra low power process?

rick merritt
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Re: Oh boy, they poked the bear
rick merritt   3/17/2017 1:45:05 PM
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Gartner means processed wafers from a foundry or IDM, not raw wafers

rick merritt
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Re: 16 FFC not yet in volume production??
rick merritt   3/17/2017 1:44:04 PM
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Hmmm, interesting. I can't explain it.

photonic
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Re: Oh boy, they poked the bear
photonic   3/17/2017 1:24:22 PM
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Intel should buy them.

emesdoublee
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Re: Oh boy, they poked the bear
emesdoublee   3/17/2017 11:51:06 AM
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@Violoncelles Read the article again.

 

The news comes the same day NXP announced it will use FD-SOI for multiple future processors. So far, a total of just 10,000 FD-SOI wafers/month are shipping from all fabs including Globalfoundries and STMicroelectronics, said Sam Wang, a chip analyst for Gartner.

I take this to mean all FD-SOI wafers worldwide coming out of Soitec including the GloFo 22.

resistion
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Re: Oh boy, they poked the bear
resistion   3/17/2017 10:28:24 AM
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Intel is another one with no FD-SOI.

FD-SOI transistor is an interesting device with the back-bias, but the fourth terminal makes it a larger cell at a given design rule.

Left5
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Re: Oh boy, they poked the bear
Left5   3/17/2017 8:58:49 AM
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TSMC made the point that you can easier migrate a 28nm design to 22ULP than to FD SOI.

Imagine that you have a design that uses power gating or clock gating to manage power consumption. Moving that to FD SOI and changing the power management to use back biasing, requires a complete re-design of the SoC.

It's also a niche area. NXP are using it for ultra low power micro controllers. I doubt anyone is going to use it for GPUs or smartphone SoCs.

 

Violoncelles
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Re: Oh boy, they poked the bear
Violoncelles   3/17/2017 7:51:02 AM
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The near futur will tell us whether TSMC is making the big mistake not to go to FD-SOI.

Of course , comparing the number of 28 nm bulk wafers with 28nm FD-SOI has no value since Samsung and ST are the only companies producing 28nm FD-SOI.
The good reason why NXP is not ordering its FD-SOI 28nm wafers to GlobalFoundries is simply because GlobalFoundries started FD-SOI with 22 nm.

FS-SOI has this valuable feature for a back-bias for low consumption and a foward bias for high performance dynamically on the same chip that Bulk Si is missing

Left5
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16 FFC not yet in volume production??
Left5   3/16/2017 8:53:58 PM
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> The 16FFC process which has had eight design wins is not yet in volume production.

Huh? HiSilicon's Kirin 960 is using 16nm FFC

http://www.anandtech.com/show/11088/hisilicon-kirin-960-performance-and-power

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