Analysts were impressed with Intel’s 10nm node, but mixed on whether transistor density was the best metric to gauge competing nodes. It’s too early to tell who will win the significant near-leading-edge business in the increasingly competitive space between 28 and 16nm, they said.
“It’s time to get away from the marketing BS of these node names and let everyone see where the nodes really are…Moore’s law was always about density,” said G. Dan Hutcheson, president of market watcher VLSI Research.
Independent analysts who conduct chip-level teardowns will be able to check density claims using the formula, he said. But a larger size, such as a cm2, would enable a comparison more close to the size of a real SoC, he said.
“We need something to objectively compare the proliferation of node names that show dimensions that are irrelevant to their names,” said Bob Johnson, a research vice president in Gartner’s semiconductor group.
A spokeswoman for TSMC said former metrics based on gate density are better than more recent ones based on cell height.
“That said I have no idea how Intel does its new calculation,” she said. “For example, it's [first-generation 14nm CPU] Broadwell used to have 18.4 million transistors per mm squared, yet under the new measure it suddenly has 37.5 million transistors per mm2. Are they trying to play paper games?”
The TSMC spokeswoman also noted that density alone does not translate directly to die size. Layout and other design rules are all important factors to die size and competitiveness, she said.
Seeing the numbers on the Intel 10nm process, “I was blown away,” analyst Hutcheson said.
David Kanter of the Linley Group agreed. “It's impressive density…but Intel made the point that it doesn’t count until it’s in production,” he said. Nevertheless, “Intel will continue to have a manufacturing lead over everyone else, the question is what that will translate into in terms of products,” he added.
Kanter praised Intel’s COAG transistor advance. However, until the company publishes how it makes COAG devices it will be unclear whether it can use the design as a new way to optimize contact resistance and thus differentiate its processes.
In the new 22FFL space, Hutcheson noted both Globalfoundries and Intel’s foundry group face challenges in developing the wealth of IP rivals such as TSMC have at 28nm.
Next page: FinFETs compete with FD-SOI
Intel provided an unusual amount of detail about its 10nm process.Click to enlarge.