PORTLAND Ore. — The paradigm of real-time machine learning is eliminating many of the human-driven elements in the physical design of microchips, according to speakers at the Association for Computing Machinery's (ACM's) International Symposium on Physical Design (ISPD).
IEEE- and Intel-Fellow Pradeep Dubey of Intel's Parallel Computing Lab outlined how cognitive computers will take over many human elements in his keynote presentation the Quest for the Ultimate Learning Machine.
IEEE- and Intel-Fellow Pradeep Dubey of Intel's Parallel Computing Lab in ISPD's "Machine Learning in EDA" session featured presented the "Quest for the Ultimate Learning Machine".
(Source: EE Times)
"Traditionally, machines crunched numbers and humans made the decisions in the physical design of chips," said Dubey. "But now machines can do both, taking computing into a whole new realm."
Previous attempts to hand over the decision making job to computers, namely rule-based artificial intelligence (AI), failed because the experts each had their own style and could not agree on an optimal set of rules. However, today cognitive computers can perform each of the four steps involved in human decision making, namely sensing, reasoning, acting, adapting and repeat, until an optimal design is achieved.
In his keynote talk Xilinx 's Ivo Bolsens explains how FPGAs make the ideal platform for EDA machine learning by providing the best performance/watt.
Today neural-network-based deep-learning cognitive-computers, however, can perform each of those four steps, albeit with a time-lag introduced during each step. According to Dubey, our task today is to increase the speed of each of those steps until they achieve realtime operation, at which point cognitive computers can take over many of the human-based elements of the physical design of microchips.
The biggest stumbling block, according to Dubey, is the deep-learning during the sensing and reasoning steps. To overcome that Intel described its new "Lake Crest" addition to its Xeon processor family, which makes use of the hardware neural networks it acquired from Nervana Systems last year. Lake Crest, according to Dubey, will enable deep-learning to take on the Big Data sets used in producing billion-gate chips in realtime.
Keynote speaker Ivo Bolsens, a senior vice president and chief technology officer at Xilinx, on the other hand, claimed that field-programmable gate arrays (FPGAs) alone can do the same job. (Of course, Intel also has FPGA technology by virtue of its acquisition of Altera in 2015.) Nevertheless, Bolsens claimed that FPGA's can accelerate the deep learning step and eventually will result in "all programmable platforms" where every part of a system-on-chip (SoC) will be hardware configurable.
"The biggest advantage of FPGAs is their very rich interconnect," said Bolsens. "There are plenty of global memory and data flow architectures that works well for machine learning on FPGAs."
This year's ISPD contest, sponsored by Xilinx for its FPGA pictured, concentrated on a key constraint in placement, namely clock legalization for reduced runtimes and increased routability as measured by wire length as the primary metric.
Bolsens also claimed that, to date, FPGAs have leveraged Moore’s Law more than any other type of chip, today achieving as many as 13 layers of programmable interconnect, thus allowing any gate to talk to any other. In addition, 28-nanometer is the sweet-spot for FPGAs, since the cost-per-gate is at a minimum at that node -- increasing when you take FPGAs to smaller geometries. Using multiple-die in the same package, as is the trend at Xilinx today, enables its short-reach 150 giga-bit per second interconnects to create one-tera-bit per second systems-in-package (SiP).
One fun highlight of each year's ISPD is its contest sponsored this year by Xilinx and called "Clock-Aware FPGA Placement." The contest motivated research groups worldwide to take on one of the most challenging problems in modern FPGA physical design--how to achieve the fastest clock speeds by reducing the length of its interconnects. The winning team came from the University of Texas at Austin, which also won the ISPD contest in 2016 too! The University of Austin was followed by National Taiwan University (NTU), Chinese University of Hong Kong, the National Chiao Tung University (Taiwan) and the University of Guelph (Canada).
— R. Colin Johnson, Advanced Technology Editor, EE Times