The resistence-switching mechanism within Crossbar's memory is based on the formation of a filament by the movement of silver ions from the top electrode within amorphous silicon. Source: Crossbar Inc.
There will be very thin layers of silver so expense should not be an issue.
There could be different bit-line electrodes above a cell sized area of silver, to further reduce the amount of silver in use.
The issue it more likely to be the concerns about using silver and contamination of equipment. These would be similar concerns to those about copper, which had to be overcome for the use of copper in IC interconnect
The only caveat I might raise there is that when flash memory involves a new memory cell structure....and even old resistence change mechanisms at new geometries....doesn't that need stringent reliability data too.
Just because something worked reliably at 90-nm and 50-nm doesn't mean it will at 19-nm and 16-nm.
For a start NAND flash cycling endurance is reducing rapidly
And different unintended consequences could be coming into play at each node.
Resistion: I think using any mechanism it is always possiblel to build a bridge and then rupture it in a fuse like manner. As long as the rupture is not too violent and the atoms stay nearby then the mechanism that created the link can be used to suck them back in. I think this would offer a means of making a uni-directional device.
Or it could be that the position of the link moves to a new location, OK if you have a large area device, you might run into a few write/erase lifetime problems when you try to scale to sub 20nm. I think in the past many of the so called memory devices based on aluminium oxide utilized this moving filament mechanism.
I know from my own experience with lateral nichrome fuses for PROMs when you try and lithographically scale them you will find that the fused devices will relink after many hours of operation with applied fields. Something to do with ion movement in the dielectrics and that is why the vertical fused PROM and the antifuze was developed.
Good point that all technologies need to be tested as they progress to smaller geometries or structural changes (like multi-level cells). Flash does have a long history however and the TECHNOLOGY is well understood.
A new technology will have a longer learning curve and most users (to my thinking) will require more compelling test and qualification data in order to feel comfortable using new devices. Just the reality with a new device made on a new technology.
I meant to agree with you strongly earlier but got off on some other perspective. Yet there are some assumptions of 100% reliability like DRAM endurance, and there are not even attempts to plot let alone extrapolate a trillion cycles or more. Surely this assumption (or any) must always be challenged!
The actual technology qual isn't going to take several years but the iterations will. I'm guessing that if they've fab'd a 1K structure, they've already started doing accelerated life testing on each "generation" to learn the primary failure mechanisms. You shouldn't excpect to see that kind of information published for quite some time as this feeds back into the heart of their technology development.
I completely agree - It is CBRAM with amrphous Silicon electrodes. May 31st, 2011 issue of Journal of applied physics shows NiO resistive memory without filaments or electroforming. We are introducing this technology in 2 months. It is fully compatible with lithography down to 20 nms and can go lower. It is free of complicated contact materials such as Pt. It uses Al, cobalt silicide and nickel silicide. Anneals at 400 C and is integratable in 3D using same electrodes with an already proven diode. The storage temperature is 400 C and the R/W is in the picoseconds. Blue Sky? not really, it is common sence to try to dope NiO instead of breaking it with filaments. This silver filament growth and others with filaments such as standard NiO ReRAMs, ignore the most fundamental aspect of a good memory - do not depend on mass transport - it is electrochemistry at the nano level - anything can go wrong. Read the 3 papers on this - the cover of the journal shows this concept which we quietly built in the last 6 years. It has the mechanism of electron correlations which is common in Transition Meatl Oxides (TMO) in a controllable way via a novel doping technique that corrects disruption in the oxidation number of the transition metal, thus allowing an ohmic state right after annealing without any electroforming step. Writes in 0.6V and 1.2 volts. Reads well above 1E13 without any performance problem. This "commercial" is simply because I am sick and tired of these "electrochemical" approaches claiming to solve all problems, when in fact, the beauty of Metal/Insulator physics is not utilized.
Whether or not the Ag filaments have to bridge is a good question. I was under the impression that the length and number of Ag filaments locally affected the resistivity of the switching medium so that the resistance between top and bottom electrodes varied. But of course that could also be dependent on the number of filaments that are fully bridging at any one time.
The market is for non-volatile memory, but I wonder if it could not be used as a very dense and low power artificial neural network chip.
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