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ReRAM Startup Bets on Silver

8/5/2013 11:02 AM EDT
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rick merritt
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Memory smorgasbord
rick merritt   8/5/2013 11:41:15 AM
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Next year will see a smorgadsbord of new memory options including these sorts of embedded memories,

SSDs in the DDR slot:
2013-07-29Flash DIMMS Invade DDR3 Slots

And 2.5-D packages:
2013-04-02Micron, Samsung, Hynix agree to 3-D memory spec

EEs will have plenty of options to evaluate.

NAND_analyst
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Isn't silver too expensive
NAND_analyst   8/5/2013 1:56:31 PM
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to use in a process like this?


Having seen all too many claims about NAND/DRAM replacements over the past 20 years that will be ready for commercialization either next year or the next 2 years or the next 3 years, I have to express amazement that people still get tens of millions of dollars for this. Stan Ovshinsky was the ultimate expert at getting all sorts of companies from Intel to Exxon to give him literally hundreds of millions of dollars over decades for multiple wild projects, very few of which ever resulted any products and even fewer resulted in earnings of any sort. I think ENER might have been that last one and they too went bankrupt.


When someone talks about the magic of the private sector, I either laugh or grimace, depending on my mood at the time.

Ron Neale
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Re: Isn't silver too expensive no
Ron Neale   8/5/2013 4:32:53 PM
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Silver too expensive?Not really, when you get down to sub 20nm lithographic dimensions it is more about number of atoms used than the number of ingots. The possible problems with silver are more technical than they are fiscal. Although from a fabrication point of view not much more difficult than introducing copper, now routine.

Those who wish to pursue this silver based memory must first have a firm belief than NAND/NOR will not be able to evolve enough to do the job required of it in the future. The private sector does then give them the opportunity to help underwrite a possible winner. In analogy, the secret of success for those who wish to invest time and/or effort is to separate the signal from the noise.

Against all the potential problems that must be solved the Crossbar memory does appear to offer what I would call a win-win-win situation as an integral part of the memory cell in that it provides: uni-directional matrix isolation, allows the bidirectional current flow required for memory operation and reduces fabrication processing steps.

As somebody who in the past has looked at long carrier lifetime diodes to obtain reverse pulse current flow as well as punch through diodes for matrix isolation to me the Crossbar memory looks worth a development opportunity.

Peter Clarke
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Re: Isn't silver too expensive
Peter Clarke   8/6/2013 5:19:40 AM
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There will be very thin layers of silver so expense should not be an issue.

There could be different bit-line electrodes above a cell sized area of silver, to further reduce the amount of silver in use.

The issue it more likely to be the concerns about using silver and contamination of equipment. These would be similar concerns to those about copper, which had to be overcome for the use of copper in IC interconnect

krisi
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Re: Isn't silver too expensive
krisi   8/7/2013 3:24:20 PM
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To @nand_analysts: can you list those examples of failed technologies over the years? I think it would be very educational...Kris

resistion
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CBRAM
resistion   8/5/2013 4:07:19 PM
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I think this is still a CBRAM, similar to the one used by Adesto. It relies on diffusing Ag. However, Adesto uses a chalcogenide rather than amorphous silicon. Amorphous silicon is highly temperature sensitive as it is still semiconducting silicon.

Ron Neale
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Re: CBRAM Not really
Ron Neale   8/5/2013 4:51:18 PM
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Resistion: I think the difference is the Adesto device is really a solid state electrochemical plating cell, in that ions must be moving in both directions.  In the Crossbar memory I am not aware that anything happens other than silver ions move through the a-SiH matrix. Silver is a fast diffuser and in the presence of high field and hydrogen can most likely move easily backwards and forwards through the matrix. The process is perhaps more akin to an electromigration like effect than  plating. 

 A more interesting question is does the filamant actually completely bridge the inter-electrode gap or does it stop short with a tunnelling gap completing the link.

resistion
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Re: "CBRAM"
resistion   8/5/2013 5:00:21 PM
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The papers by the developers Sung Hyun Jo and Wei Lu indicated bidirectional switching, rather than using one direction. Ag filaments are formed, though claimed not in the sense of electroplating or "programmable metallization" of the counterelectrode. But even the CBRAM guys have reported unidirectional switching which might be diode-compatible.

But at least for me, it's 'CBRAM' if the source of the filament is one of the electrodes.

Ron Neale
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Re: "CBRAM" bridge and rupture
Ron Neale   8/6/2013 5:52:24 AM
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Resistion: I think using any mechanism it is always possiblel to build a bridge and then rupture it in a fuse like manner. As long as the rupture is not too violent and the atoms stay nearby then the mechanism that created the link can be used to suck them back in. I think this would offer a means of making a uni-directional device.

Or it could be that the position of the link moves to a new location, OK if you have a large area device, you might run into a few write/erase lifetime problems when you try to scale to sub 20nm.  I think in the past many of the so called memory devices based on aluminium oxide utilized this moving filament mechanism.

I know from my own experience with lateral nichrome fuses for PROMs when you try and lithographically scale them you will find that the fused devices will relink after many hours of operation with applied fields.   Something to do with ion movement in the dielectrics and that is why the vertical fused PROM and the antifuze was developed. 

resistion
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Re: "CBRAM" bridge and rupture
resistion   8/6/2013 6:58:50 AM
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Fascinating!

nonvolatile
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Re: "CBRAM"
nonvolatile   8/7/2013 8:01:30 AM
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I completely agree - It is CBRAM with amrphous Silicon electrodes. May 31st, 2011 issue of Journal of applied physics shows NiO resistive memory without filaments or electroforming. We are introducing this technology in 2 months. It is fully compatible with lithography down to 20 nms and can go lower. It is free of complicated contact materials such as Pt. It uses Al, cobalt silicide and nickel silicide. Anneals at 400 C and is integratable in 3D using same electrodes with an already proven diode. The storage temperature is 400 C and the R/W is in the picoseconds. Blue Sky? not really, it is common sence to try to dope NiO instead of breaking it with filaments. This silver filament growth and others with filaments such as standard NiO ReRAMs, ignore the most fundamental aspect of a good memory - do not depend on mass transport - it is electrochemistry at the nano level - anything can go wrong. Read the 3 papers on this - the cover of the journal shows this concept which we quietly built in the last 6 years. It has the mechanism of electron correlations which is common in Transition Meatl Oxides (TMO) in a controllable way via a novel doping technique that corrects disruption in the oxidation number of the transition metal, thus allowing an ohmic state right after annealing without any electroforming step. Writes in 0.6V and 1.2 volts. Reads well above 1E13 without any performance problem. This "commercial" is simply because I am sick and tired of these "electrochemical" approaches claiming to solve all problems, when in fact, the beauty of Metal/Insulator physics is not utilized. 

Ron Neale
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Re: "CBRAM" Interesting
Ron Neale   8/7/2013 9:00:59 AM
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Nonvolatile you are making some extremely interesting and bold claims. I think It would be useful if you would clarify some of the following. "It has the mechanism of electron correlations which is common in Transition Meatl Oxides (TMO) in a controllable way via a novel doping technique that corrects disruption in the oxidation number of the transition metal, thus allowing an ohmic state right after annealing without any electroforming step."

Without the proprietry detail could you clarify what you mean by a novel doping technique and is the annealing (forming) part of the fabrication process?

Also are you claiming an isolating diode as an inherent part of the structure?

I know IBM have been looking at modifying the conductivity of vanadium oxide by introducing ions and extracting them that does something similar to what you are claiming and they could claim this is a novel doping technique, but it does involve movement. I will dig out the reference.

Can you name the company that is covered by the word "we"?

Couple of refs transition metals from my archive notes

http://domino.research.ibm.com/tchjr/journalindex.nsf/c469af92ea9eceac85256bd50048567c/b5cffeae5b717b4a852574a60078c734!OpenDocument

http://domino.research.ibm.com/tchjr/journalindex.nsf/c469af92ea9eceac85256bd50048567c/b5cffeae5b717b4a852574a60078c734!OpenDocument

 

 

nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 10:07:01 AM
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Manager - I clearly understand that these are bold claims. And for that reason we only published 3 papers on this as we were awaiting for patents to issue. Thank you for your references on TMO - we have a library with about 7000 articles within our group.

I will try to answer your questions and clarifications, but if they do not satisfy you, then, write me again.

(1) TMOs are materials with incomplete 3d energy levels. In NiO, the NaCl lattice in fact has a unit cell that is Octahedral of the MO6 coordination. That is 1 Nickel anion and six oxygen cations, creating the NiO complex. Since 1937 that it is well known that NiO and transition metals oxides in general do not follow the Bloch-electron/Wilson's band theory. The reason is that in the case of Ni, the poster child of this observation, the next shel, 4s, in this case actually has no effect in bonding and leaves the 3d8 orbitals to interact with the oxygen 2p states. What then happens is a nature driven "disproportionation" a big word that means that the material goes simultaneously through an oxidation-reduction reaction in a single site. In the case of NiO, this is the reason why typically the native state of NiO is an insulator, when in fact, according to band theory, it should be a metal. Sir Neville Mott usesd NiO as the example of a electron density driven phase transition. The simple way of showing this is to show this reactio (the disproportionation): 2Ni(+2)O)-2)---Ni(+3)O + Ni(+1)O. In simple terms, the native "NiO" is the equation's right side, which splits the 3d8 state into two separate states "3d7 and 3d8" - a gap caused by this splits is called a Hubbard U gap (technically and specific to NiO this is not exactly the key gap, but for this discussion it surfices). For many years since 1957, studies of all TMOs for metal-to-insulator phase transitions, including a zillion theoretical paers entered the literature. Now, what is important here is that the Ni species that I showed above are in the lattice, and not a bunch of different oxidation numbers that do not participate in the disproportionation. Let me explain, Take any reference on NiO ReRAM, (or other TMO), and you will see the XRD spectra with Ni(0) and Ni(+4). These become "dead" clusters that sit there and together with oxigen vacancies make the mess that kilss reliability. When vacancies move, atoms also move etc. This is the idiotic TiOx "memristor" which is truly the parasitic device in all ReRAMs. Carefull look at "Coordination Chemistry" will show that oxigen is not the only Ligand of a Transition metal. Many others occur, and the most common one and easily incorporated in the sources (proprietary part-can't say of what deposition equipment) is Ni(CO)4 which at 60 C makes Ni5(CO)10 stable complexes. Loking at this the "CO" doping is novel and we patent it in every important country - including china. All patents now issued so we are starting to transfer this to industry with example devices. So, the trick in all TMOs is to control the "coordination sphere around the metal anion" to force the oxidation number to stay ameanable to the phase transition from metal to insulator and vice versa. This is the "Novel" doping technique.

(2) All  complex oxides need to be annealed - this is not to be confused with "forming, such as Electroforming", but it is not wrong to say "forming" in the sense that annealing forms the proper crystalline phase.  The annealing temperature for us is between 390-450" - typically 400. A key point is that the device is 60 nm or less in thickness, but done in 3 layers of different conductivity(doping levels) such that the possible schottky barriers at the contacts are screened and space charge is reduced. Then, the active area in the middle is 20 nm thick or less.

(3) The "electroformed ReRAMs" out there, start with a sputtered and then partially oxidized TNO. They use Platinum because the connect/disconnect of a filament uses the myriad of oxidation numbers within the space chrge region. Because the definition of a "Mott insulator" is that each ion has an independent transiton (In the language of the trade it means "The self-energy is position independent"), eventually a sporadic reaction occurs in the highly deffective surface that closes or open the contact to the filament - this also happens near grain boundaries internal to the device. Now, the off state of such a device is very sensitive to temperature and dwell time of the write pulse. If tested by pulsing and then raise the temperature and repeat, all these ReRAMs will show an activation enerfy of around 0.43 eV (NiO) which is exactly electron detrapping. Thus, ReRAM with filaments are really a charge trap device. We call our device CeRAM - Correlated Electron RAM, to separate ourselves from the filament crowd. The electron-electron repulsion inside 3d is found in the right side of the chemical equation and the metal-like in the left side. Papers using pressure to achieve the Metal/insulator transition are all over the literature. But, pressure corms the metal side, due to wavefunction overlap, and releasing it forms the insulating phase. The same can be accomplished by mesoscale devices and electron injection - too much detail to explain here. In any case, devices that are "ligand Compensated" work beautifully right out of the oven - No electroforminf, no filaments.

(4) Your reference to IBM is partially correct. In their case, they use the field effect to do what is called "electrostatic doping" But, this FET is full of problems and I do not want to bore you.

I am not in a position to give our company name at this time, but you can use my personal email - caraujo@aol.com

Regards

nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 10:17:36 AM
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Correction: 3d8 splits into "3d7 and 3d9". Sorry for the typos.

resistion
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Re: "CBRAM" Interesting
resistion   8/7/2013 10:41:42 AM
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I am intrigued. To prove your memory is non-filamentary, it must show resistance that has weaker than inverse proportion to area dependence. In addition, although not commonly shown, the burden of electroforming may be significantly relieved thermally. I.e. the formation of defect-based RRAM may proceed with a similar process to CeRAM. For different reasons, of course.

nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 11:07:22 AM
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Manager 

You are correct, but such a preliminary analysis you should understand that we have already done. This was 6 years ago.

The key issue is that area dependence is almost zero in the conductive sice, but the non-conductive side, is really an MIM diode-like device. Such a device would have area dependence whether you have filaments or not. This area dependence of the high resistive side is beneficial because in fact it enhances the read noise margin. The problem is that in filamentary devices, the random connect/disconnect does not afford   good and systematic stability of what the diode induced area dependence is. Think of it as a "soft broken " insulator.

Now, your suggestion about a thermal effect creating filaments and we just missed them has been deeply studed, specially in the case that the active region is in the metal and of only 5-20 nm. The doped NiO of the outside buffer layers are always conducting as the pi bond of the CO:Ni is a strong electron donor. So, there is a direct short from electrode to the active region. Within that region the Ions have just enough electrons to switch on or off the coulombic interaction U. So, there is no possibility that a large highly conductive region connecting the electrode to the active region to form filaments. And, a thermal filament formation would show variations as the 20 nm layer would be stuck in an always on connected filament. Very high Resolution TEM and EELS show the right mechanism, but if you missed the point of the doping and the octahedral crystal field control of the oxidation number, I can see that it is easy to look for other explanations.

Perhaps you could take a look at a wikipedia article on Mott Insulators and see that an enormous effort in the last 60+ years, found Metal to Insulator transitions in TMO without ever mentioning filaments.

Finally, let me add that one of the most difficult problems with ReRAMs is the high on current - filaments in the majority of the case are metallic and follow the patch surrounding grain boundaries - so, how to lower the on current. In our case, the CO doping and element doping are independent mechanisms, so we can dope for coordination correction with CO and for scattering increase to lower the on current 5 orders of magnitude. If we had filaments, such a control of the on current would be impossible.

resistion
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Re: localized conduction?
resistion   8/7/2013 11:56:07 AM
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So you have area independent conduction? It's localized then? Though not exactly like RRAM filament, maybe it still has similar effect like self-heating?

nonvolatile
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Re: localized conduction?
nonvolatile   8/7/2013 12:20:35 PM
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Sorry CEO - this is not joule heat. It is also not "localized", but can be made as big as a 44 by 44 micron device, and still turns on at nearly zero volt. It would be really hard to fire up something like that with a pulse generator, don't you think?

Try something less "classic". Try electron localization (not of the Anderson type, found in heavy doped MOSFETS);

An electron just a few angstron from the core ion gets localized if the electron density (from 4s states and injected)  goes down to a critical level following { a }*cubic root of n) = 0.26., where a is the bohr radius and n is the critical electron density----time to dust off that old copy of KITTEL my friend.

Not every material should be understood with a simple shortenned hamiltonian - try to add wannier functions or a tight binding model plus a coulombic localized interaction....

resistion
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Re: localized conduction?
resistion   8/7/2013 11:48:42 PM
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Reading your 2011 papers, it seems you still need compliance, like other RRAMs.

nonvolatile
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Re: localized conduction?
nonvolatile   8/8/2013 12:43:04 AM
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Yes, this is true for any resistive memory. This is however a a requirement of the off to on transition. The narrow band of the TMOS is a reason for the ballistic transport. Now there is a relationship between compliance current and on current, with proper doping that saturates to low levels, even for these large areas it goes down to 100 micro amps so this very smal in nanoscale devices. So,the buffer transistor or even 1t1R this is fine. In the Array only type, the diode limits the current well. finally, current reduction was publish in another paper. I can send you a copy because It was in a conference.

nonvolatile
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Re: localized conduction?
nonvolatile   8/8/2013 12:53:44 AM
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Furthermore, when we lower the current in the on state by element doping, we see only the increase in the on resistance- a very desirable result, The compliance is only controlled by CO doping. It is another evidence of no filament conduction as the two currents are coming from two different mechanisms, the 3 layer data is even more controllable. This was shown 3 days ago in the MRS ISIF meeting in my keynote lecture.

nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 10:14:59 AM
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Manager - I just noticed your question about the diode.

We consider using the diode only in 3D, not in the planar mode - although there is nothing impeding that. The diode for us is aspecial layer within our doping scheme, but not inside the two electrode areas of the device. It is under the bottom electrode. The window from -V to +V is about 1.4 volts, clearly allowing the -V/2 to +V/2 array pulsing without cross talk for the array-only large scale memory. As we write at 0.6,1.2 and read around 0.1-0.2 volts, this is not a problem, as both of these voltages divided by 2 are within the non-disturb window. Our device would look like the 3D version of Samsung, in which they use the diode made of Vanadium Oxide as a varistor. But, we do not have anything foreign to add to our process like that. Besides NiO, all materials are already in the fab.

Peter Clarke
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Re: "CBRAM"
Peter Clarke   8/7/2013 11:01:25 AM
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Interesting claims that seem to be based on the Mott transition in such materials as nickel oxide and vanadium oxide.

We do wish you will tell us more about what you have done, for what company and how you have been funded.

Is it not the case that there is a temperature associated with Mott transitions which can be in the room temperature range? Is it necessary to somehow remove that temperature dependence to avoid reseting of memory?

 

 

 

 

nonvolatile
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Re: "CBRAM"
nonvolatile   8/7/2013 11:49:31 AM
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Dear Peter/Staff,

I would like to first answer the question on Temperature dependence of the Mott transition.

Yes, in VOx that is the case - but the true definition of a Mott transition is quite complex and is still an area of major study in condensed matter physics. That being said, it is better to consider this without the specific lable "Mott Transition" to the more general label of "Metal Insulator Transition (MIT)" and the reverse IMT. Now, the well known formula of the relationship between electron density and lattice length -a - is 1/n = (4/3)(pi)r^3, in this sense (in a very rough manner), we can see that r is the radius of the ion-core potential. So, as you can see, if r=bohr radius we have no bound state and the material is a metal. If r=screening length which is related to 1/n and the density of states, a reduction of electron density is just enough for the screening length capture an electron and form a bound state. Subsequent to that, we then have electrode polarization that injects electrons in the cathode side at Vset, and when at a lower voltage it starts the on mode (metal side), it injects holes and attract electrons in the anode side . As the quantum phase transition is of the order of femtoseconds, we have the ability to shut off electron flow because  (1) the barrier for electrons in the cathode is high now, as Vapplied is smaller, and (2) The electron deficit near the electrodes trigger the bound state to be create faster than the drift velocity of the electrons that may still jump the cathode barrier. This lack of thermal equilibrium is the reason why the insulating state now comes into play and the device is off. Stability of Vset and Vreset, together with Low on current are key for device reliability, Also, it is necessary to really model this device using the tools of many body physics, where the electron-electron interaction is dominant. Such electron localization is not used in semiconductors and common materials because the bloch electron does not interact with other electrons when it is in the conduction band. So, textbooks in semiconductors and simplistic filament or not brute force devices will never be reliable, as we have a physical phenomena embedded in a sea of defects. To summarize, This is a complex device - it is controlled by a baseline MIM diode with a quantum phase transition that is electron density driven. Without concepts from many body theory, such as Self-energy etc. it is a real pain to explain the phenomenon and "sell" the idea.So Data talks and the rest walks - and for this reason we kept quite.

My company has its own financial resources and it is privately owned. Now, we may have to open for capital infusion but we may not have to.

We do not follow the capital raising path and we are 27 years old with a portfolio of over 200 patents. We sold many licenses, and the royalty stream is enough to continue innovation. We are responsible to about 1.3 Billion devices in the market in many areas. Eliminating the influences of chasing money, we believe that true innovation must be fundamental and game changers. So, we took good care of this discovery and we are working in materials beside NiO already for magnetic oxides and light switches, This is truly a magnificant chance to innovate electronic devices - there is no nonvolatile memory without some form of hysteresis. Even flash has a threshold voltage hysteresis due to floating gate charge trap and reflection of that to the channel. So, since all electrodes from 65 nm down are nickel silicide, the low temperature NiO is key, and the elimination of Pt as an electrode is just right, Imagine, we have NiO with Al electrodes, talk about a post process memory for the embedded guys. So we have designed a 64M device for the 22 nm node and we are doing TEGs to get full design parameters etc.

We are the guys that many years ago made front page with nonfaigue FeRAM. By using SBT instead of PZT, we have the world's most used FeRAMs coming out of Panasonic. Yes, it had an embedded microcontroller in every SUICA and it is in playstations, drivers licences and a myriad of devices. It works at 1.1 Volts in the 0.18 micron node and can be made as this as 25 nm for future nodes. Unfortunately, since 65 nm and below, annealling cannot go over 400 C, ferro is not going to large scale. So, we quietly switched to do ReRAM, but came out as CeRAM, so that we work in the realistic world based on solid physics.

My Company is Symetrix Corporation - Colorado Springs.

I recieved in 2006 the IEEE Daniel Noble award for FeRAMs and I am an IEEE fellow, so now you can discount exuberant enthusiasm as found in many memory house start ups.

CArlos A. Paz de Araujo

 

Peter Clarke
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Re: "CBRAM"
Peter Clarke   8/7/2013 11:55:25 AM
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Hi Carlos

You may not recall, but I remember talking to you shortly after the formation Symetrix Corp. when I was working on Electronics Times.

nonvolatile
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Re: "CBRAM"
nonvolatile   8/7/2013 12:10:34 PM
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Yes, I remember your name, but did not recognize your picture - that was 27 years ago. We are sure crazy still doing this stuff. Thanks for the remembrance. I did not want to review our company at first because we are sending papers to Nature etc, then we would enter in conversations with licensees. The IV characteristics and other parameters of this device are explained with things like "lesser Greens's Functions" and other concepts not so common in the semicoductor industry, so I wanted to place this into the top journals. Thus, 2 years ago we published 3 papers in the journal of Applied physics. These wer verysuperficial but strong enough to get some interest going, Then I went to the last IEDM, where I was recognized as a new IEEE fellow, and I was very upset to see that nothing had changed in this filament world. Classic reviews like Imada's in Phys rev. clearly cast the "new Electronics" in the world of TMOs. Imagine a 2 terminal switch without silicon in Femtosecond speeds, So, I could not resist.

nonvolatile
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Re: "CBRAM"
nonvolatile   8/7/2013 12:26:04 PM
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By the way Peter, Not that I am in the Silver CBRAM boat, but I just want to remind a few that Ag is a transition metal too---

resistion
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Re: CeRAM
resistion   8/8/2013 2:00:54 AM
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Very interesting papers in Issue 109 of J. Appl. Phys (2011). So the NiO in insulating state has 4.3 eV bandgap?

nonvolatile
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Re: CeRAM
nonvolatile   8/8/2013 8:55:56 AM
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1 saves
There is still a lot of controversy on the bandgap of NiO. But, this is the latest number. This is a photemission band gap which may represent the the lowest level 3d7 to 3d9. Not to be confused with a Band Insulator bandgap. If you look in the literature there are 4 types of insulators: Band Insulators (like SiO2 -wide band gap), Anderson Insulators (Heavily defective materials kills the mobility), Mott insulators (Extended states, like the Bands in a wide band device do not exist, only the coulombic interaction (Hubbard U) forms a gap) and the Charge Transfer type of Mott Insulators ( Same as Mott insulators in principle, but the energy gap is formed from the diference of a lower 2p state from the Oxygen and the upper 3d9 state - this gap is called Delta).

The controversy for NiO was resolved in the  90's when it was discovered by photoemission spectroscopy that it was a Charge Transfer type - this means that Delat is less than U. So for a true Mott insulator U>Delta. It is a fine detail that I mentioned before but did not elaborate. The density of states (DOS) shows a gap for delta around 1.2eV if there are not too many vacancies of oxygen. Thus, the dispersion in Vset and Vreset that is common in these NiO memories is because this Delta is localized and not a Typical bendgap of a band insulator or a semiconductor. 

It is very common to confuse the Band theory for independnet electrons (Semiconductors, band insulators) with the Localized "narrow bands" of an insulator with interacting electrons. This has been a very difficult point to explain this device. The correction of the oxidation number at every Ni site is done by fixing the coordination sphere to the required oxidation number that can be manipulated by the applied voltage to set or reset. This is not substitutional elment doping (called hydrogenic states) as it is done in Semiconductors, where the dopant takes a place in the lattice and loses its electron to the conduction band, This is very different, for a TMO usually is not a band insulator. So, the electron is localized and the bound state (forming delta) can be destroyed at Vset via the change in the background electron density increased by the injection from the cathode. It is a dynamic process that changes the NiO from an insulator to a Metal-like material. Undoing this by temperature is not easy -that is why 400 C retention is achieved. 

In summary: TMOs are not semiconductors, they switch due to the electron-electron part of the hamiltonian of a solid - that is set to zero for semiconductor because due to pn=ni(2) makes typically a free electron in the conduction band to occur at about every 10,000 atomic site. Thus, the "independent Electron Approximation" works. If your education is only semiconductors, you do not know and cannot appretiate the physics of electron-electron interactions. An example of e-e interaction that you may already know are the superconductors (BCS type) in which a Phonon and 2 electrons interact to form the superconducting state. For hi Tc, the Hubbard Hamiltonian is more in practice to model. In TMO case, the Hubbard Hamiltonian is a classic, and the kinetic energy to Potential energy ratio controls the metal to insulator transition.

My view is that semiconductor only people did not get educated in these fine parts of solid state - that is why to this date few understand the nuances of ferroelectric and now TMO. Brute force filament creation is not the way to go in ReRAM, however for more than 15 years that is all that is done. With this new "Coordination doping" strategy, a TMO is manageable without frying it first with electroforming.

---good tricky question CEO, but we've been there and done that. Careful science is a pre-requisite to real breaktrhoughs. And, data talks - so if we have no electroforming by materials design, we are so naive to confuse the band insulators with the other types.

Thanks for the challenge.

nonvolatile
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Re: CeRAM
nonvolatile   8/8/2013 8:58:47 AM
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1 saves
Sorry for the typos- key correction:

Mott Insulator: U<delta

Charge transfer: Delta <U

I had it backwards in the last post.

jaybus0
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Re: CBRAM Not really
jaybus0   8/7/2013 8:24:58 AM
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Whether or not the Ag filaments have to bridge is a good question. I was under the impression that the length and number of Ag filaments locally affected the resistivity of the switching medium so that the resistance between top and bottom electrodes varied. But of course that could also be dependent on the number of filaments that are fully bridging at any one time. 

The market is for non-volatile memory, but I wonder if it could not be used as a very dense and low power artificial neural network chip.

 

Ron Neale
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Re: CBRAM Not really
Ron Neale   8/7/2013 9:38:24 AM
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Jaybus0-When trying to locate (guess) where the built-in diode is I looked at the case of bridging filaments. In that case I think you come to the conclusion that the diode would have to be formed at the touching junction of the tip of the silver filament and the polycrystalline electrode and that would be a Shottky barrier diode. However if you assume the bridge is not complete then you have a couple of options either again a Shottky along the surface of the silver electrode and the tip of the filament, or a conventional pn aSi-polysilicon diode at the crystal electrode interface. Or if a doped amorphous silicon involved in a two part a-Si structure that is another possible location formed by an amorphous pn diode.  We will see.

 

 

resistion
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Re: CBRAM?
resistion   9/29/2013 6:33:21 AM
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Ron, just came across this today, thought back to this discussion. Although it seems the filament growing forward into Si seems different from the deposition "backward" toward silver, it looks like he (founder of Crossbar) is still classifying the Crossbar memory along with the other CBRAMs (as ECM). It is possible the electrochemical reduction is occuring in the silicon instead of a Pt electrode.

http://sites.ieee.org/sfbanano/files/2013/06/Lu_NVMT_2013.pdf

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   9/29/2013 7:35:20 AM
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Resition-If you mean there is some form of interface layer at the Pt electrode that is responsible for the switching and the mecahnism is oxidation-reduction, then I think it is necessary to show the chemical/electro-chemical reaction involved. 

ECM or not, for the moment because Ag does not need much encouragement to move in silicon, amorphous or xtal, then for me heat and electromigration/electric field effects suffice. My worry with the Crossbar device is to create the filament, material must be moved from the silver electrode leaving what must be an Ag depleted spongy like contact region of nano filaments. Does that material return to the same place when the polarity is reversed, my view is that the material forms mutiple short filaments around the region from where the silver was originally removed. That is along the lowest resistance paths.

The nice thing about having an interface layer close to the passive electrode that switches and is responsible for the memory effect is the suspect contact at the Ag electrode depleted region once formed does not get modified.  However, I think memory devices that require a forming step different from normal operation do not have much of a future. from my experience with antifuses that used amorphous silicon threshold switching occurred on programming, for the Crossbar device will the first switching event in the virgin a-Si be the same a subsequent ones. 

I do have a number of slides that we prepared for a possible article that illustrate what I see as the problem for Crossbar, if you contact me I will send them to you. Also if you want what I think might be an example oxidation and reduction at a single site then perhaps CeRAM might be a better example-more on that later.

 

 

resistion
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Re: CBRAM? ECM or EM good question
resistion   9/29/2013 9:34:19 AM
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Thanks I would be interested. Earlier I meant the Ag+ ions might be neutralized in silicon instead of at the electrode. But the other effects you mentioned also could play a role.

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   9/29/2013 2:03:30 PM
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Resistion- Hydrogen should be the only other element that is available in a-Si and would have the possiblity of being mobile. (Remember a-Si is a sub hydride of silicon). I am not sure  if it possible to make a silver-hydrogen ECM cell where oxidation-reduction takes place in the OIL RIG* sense. I did look at the possibilty that the movement of Ag into the a-Si lattice would displace hydrogen into the void at the depleted surface of the Ag electrode. I would think that would most likely trigger the crystalization of the a-Si and that would not be reversible.

For an Ag-aSi-xtalSi  Crossbar memory structure I also looked at the possibility that solid state epitaxy on the single crystal surface might account for the diode/non-linear element (or even be a way of creating one). In the the distant past I did use palladium as a catalyst for low temperature solid state epitaxy of a-Si on xtal crystal after switching for use as a PROM. Some of the details are in my US patent No 4,174,521.

Sorry *OIL-RIG Oxidation Is Loss-Reduction Is Gain, of electrons

resistion
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Re: CBRAM? ECM or EM good question
resistion   9/29/2013 9:00:24 PM
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I see, so the presence of mobile hydrogen could be an electrochemical complication.

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   9/30/2013 9:13:43 AM
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Resistion-Not so much a complication, for me more a process of elimination of all possibilities. I tried to look at all the possible ways in which an electrochemical cell might be formed from the elements available in the Crossbar memory structure.

resistion
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Re: CBRAM? ECM or EM good question
resistion   9/30/2013 1:00:58 PM
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So it's neutral Ag that's moving?

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   10/1/2013 2:59:10 PM
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Resistion-I went back and had a look at K-H Kim's thesis. It states "..movement of Ag ions in the a-Si matrix..." Suggesting a belief that those were ions moving towards the cathode, with a positive charge. Belief because there was not much evidence provided to prove the point; perhaps I missed it. It is not clear to me what elements provide for the oxidation-reduction prcess to form a ECM cell and provide the positive charged ions that you suggested need to be neutralized. Describe that for me with the elements available and you can have your positively charged Ag ion.

The thesis also states ".. Current can only flow through the device with a positve bias.." By that I think it is the current for programming to the low resistance state making the Ag electrode positive. The reason for that is because of the non-linear element that is somewhere in structure.  Current does flow in the reverse direction for erase.

PhyandEE
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Re: CBRAM? ECM or EM good question
PhyandEE   10/1/2013 11:50:12 PM
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I don't quite understand why they use Ag in a circuit. Silver is known for its serous migration effects under an electrical field. The heat by current makes this even worse. I don't know how they solve the reliablity issue using such a material.

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   10/2/2013 5:26:27 AM
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PHYandEE: I think you will find I made the same point in my comment to Peter Clarke that you will find in the last page of his piece above. I think the fact that silver is a fast diffuser in silicon and needs very little encouragement (electric field, current, heat) to move is the very reason the Crossbar device "works".

However, remember there was a time, for similar resons, when if you suggested that you wanted to use copper as a conductor on silicon people would have advised you it was not a wise step, they might have used stronger language, now its use is common.

 

PhyandEE
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Re: CBRAM? ECM or EM good question
PhyandEE   10/2/2013 8:47:48 AM
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Copper might be a different story. To solve this problem, for example, additional diffusion barriers are used. 

But in their work, they seem to use silver as the conducting bridge (filament). The silver atoms diffuse through the amorphous silicon and form the filament for switching. The problem comes. Silver atoms can diffuse through the whole silicon layer. The silicon layer can not be perfect. With the electrical field applied, with the heat generated, and with the time, it is a big problem. 

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   10/2/2013 9:52:03 AM
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PhyandEE: I was not trying to minimize the potential problems of mixing Ag and the silicon fab process but I think it should be possible to create an Ag based memory pore structure that keeps the silver isolated, in the same way as in the case of copper-silicon. However, I think the fact that silver is a fast diffuser in silicon raises a potential reliability problem at the memory cell level. The filament represents a silver concentration gradient in the a-Si so I would think there is a distinct possiblility that with the device in its on state the filament might just diffuse away in a radial direction with time-temperature, resulting in failure. If that is what you were trying to imply then I agree with you. When we see the reliability test results for representative devices (20nm) that should give us a good idea of the magnitude of the problem, "big" or otherwise.

 

yjdong
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Re: CBRAM? ECM or EM good question
yjdong   10/15/2013 4:07:03 PM
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The reason Ag was selected is: it is the only metal that showed rectified switching behavior in the metal/a-Si/c-Si structures that I tried.

The origin of crossbar switch can be tracked back to this paper.

http://cmliris.harvard.edu/assets/NanoLett_8_386.pdf

Besides the fast diffusion issue as you discussed, the poor thermal and chemical stability of Ag could also be problems when scaling down and stacking up 3D crossbar arrays.

I thought some Ag based alloys (with better stability) could be one way to overcome these problems while maintaining the rectified switching performance.

Hope Crossbar could give them a try.

 

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   10/15/2013 6:36:40 PM
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yjdong: Yes other fast diffusing elements or alloys may be possible and certainly should be tried (Cu or as you suggest an alloy, e.g. CuAg ?). For the paper I was preparing I was going to suggest three locations for the diode or non-lnear element. The first choice is the contact between the tip of the silver column and the poly silicon, forming a Shottky. If in that case the actual growth and removal of the bridge occurs at its centre away from both electrodes, it would mean the the diode and the contact between the silver and the column remain fixed once "formed" If a diode in that location must be formed and remade for each write/erase event that adds another variable to my concerns about the contact between the Ag electrode and the silver column or dendrites

If you are prepared to accept that the bridge leaves a small tunneling gap at its tip and then I suppose there is just the possibility that a diode could be formed  between all the interfaces between the Ag and the polysilicon or at the polySi-to-aSi interface.  I think the diagram the accompanies this article does not attempt to account from where the ions shown floating in the a-Si have come.  If you contact me through EETimes your certainly welcome to my diagrams/figures. Is silver essential don't know.

yjdong
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Re: CBRAM? ECM or EM good question
yjdong   10/22/2013 10:07:38 PM
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To Ron Neale,

I agree that the most possible choice of the non-linear element location is the contact between silver filament tip and the polysilicon, but not sure whether it is a Shottky or not.

Just for your information, a good theory has to be able to explain the observed metal differences.

Some examples of other metal/a-Si/c-Si switching behavior can be found in fig12 of patent publication #:US20110001117 A1
http://www.google.com/patents/US20110001117?cl=en

Metal dependence was also observed in previous work on metal/a-Si/metal switches (like summarized in this reference: Owen, A. E. et al. Int. J. Electron. 1992, 73, 897.)
It was this paper, also your classical 1970 paper, that made me realize the origin of the switching could be the amorphous semiconductor and motivated me to try different metals, which led to the discovery of the Ag/a-Si/c-Si switch in Nanowires.

To RhyandEE,

The work at Harvard was based on bottom up nanowires, while UMichigan work by my previous colleague was to apply this discovery to CMOS compatible planar structures, which wasn't of interest to my advisor at that time.

As to why other metals didn't work as well, the diffusivity difference could be one reason. HRTEM observation of the switching process might provide the ultimate experimental explanations of the metal difference. Which I believe Umich are still working on. But there might be some technical difficulty in observing Ag/a-Si/c-Si structures in TEM and the video they presented on Crossbar website may not be clear enough yet. 

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   10/23/2013 7:04:49 AM
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 Yjdong:-Looking at other metals and Shottky formation, I suppose the question is how much is the original amorphous silicon structure disturbed by the movement of metal into and out of that structure, the ideal situation would be not at all. My view is that would only occur if the movement was electro-migration/current density/diffusion driven, candidates Ag, Cu and even Gold.

In which case the metal poly/single crystal contact would most likely be considered a Shottky. I would suggest that trying to detect how much the amorphous structure has changed would be the basis of the analytical technique.

As one moves away from that ideal situation the alloying of the metal with the amorphous silicon has to be considered. In the extreme case that would be say a VIA formed using a refractory metal and a-Si where say an irreversible W-Si alloy link is formed. In the intermediate case if in its molten state the Si-X alloy can form an electrochemical cell that would provide the needed reversibility for an NV memory. In all three cases the threshold switching effect displayed by a-SI provides the means for localizing the current and raising the temperature. 

resistion
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Avoiding the key question
resistion   10/23/2013 7:57:30 AM
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So it all boils down to the key question: how does this Ag-aSi system conduct vs. temperature? Is there a Schottky fit? Is there an activation energy? Could there be a crystallization temperature involved?

PhyandEE
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Re: CBRAM? ECM or EM good question
PhyandEE   10/16/2013 11:56:48 PM
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Do you think what is the difference between your work at Harvard and the work at U Michigan?

 

PhyandEE
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Re: CBRAM? ECM or EM good question
PhyandEE   10/17/2013 12:13:26 AM
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-yjdong-

You said you tried other metals. Why they did not work? Is it because they do not have a good diffusion capability as silver?

HongWei_li
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Re: CBRAM? ECM or EM good question
HongWei_li   1/21/2014 1:16:15 AM
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Ron, could you please send me a copy of the your slides for crossbar? my email: jerry_lihw@sina.com  Thanks

Ron Neale
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Re: CBRAM? ECM or EM good question
Ron Neale   1/21/2014 5:02:54 AM
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My slide set is winging its way to you.

yjdong
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Re: CBRAM? ECM or EM good question
yjdong   2/5/2014 9:00:47 PM
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Hi Ron,

Can I also get one copy of your slides?

My email: yajie.dong@gmail.com

Thanks very much,

 

Peter Clarke
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Re: CBRAM
Peter Clarke   8/6/2013 5:20:35 AM
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Good point

resistion
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sneak path
resistion   8/5/2013 4:22:09 PM
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I think the si sneak path is reason they are stacking horizontal crossbars. The silicon needs to be broken into islands, and cannot be continuous with a common Ag electrode.

This approach might still be cost-effective if the number of stacked levels is not too large.

As I understand it, the published 3D NANDs fabricate 8 levels at a time.

DrFPGA
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Seems Like Reliability will be the Big Test
DrFPGA   8/5/2013 4:57:00 PM
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So, how much testing do YOU want to see prior to using a new technology? I'd like several years worth of data...

How does that impact launch dates for the new memory products? Gives existing technologies quite a lead. 

resistion
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Re: Seems Like Reliability will be the Big Test
resistion   8/5/2013 5:08:11 PM
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The existing technologies aren't that reliable. Sure you have to test reliability with best effort but it's always subject to challenges and customer paranoia. Freescale gets a lot of automotive electronics parts returns from "paranoid" customers. Generates good reliability statistics.

Ron Neale
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Re: Seems Like Reliability will be the Big Test
Ron Neale   8/5/2013 6:46:20 PM
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Dr FPGA The technology will stand or fall based on reliability test results. Yes years are needed, but I think very large numbers of devices and memory arrays tested will be a good substitute.  The results must be backed up by the exact numbers of devices tested with the exact details of the test conditions under which they were tested and the failure anaysis. The problem is without read verify after every write/erase operation it is possible for devices of this type to undergo write fail-repair cycles with the result that in a free running w/e test the device appears to be operating normally many cycles after a failure would have been recorded in the a real world application. This can lead to erroneous claims of long intrinsic write/erase lifetimes with the problem that those numbers are never achieved with real products. In those cases the definition of intrinsic lifetime appears to be the lifetime achieved once when the claiment was not too careful with the test conditions. Lets hope Crossbar will avoid those pitfalls.

Peter Clarke
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Re: Seems Like Reliability will be the Big Test
Peter Clarke   8/6/2013 5:25:23 AM
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The only caveat I might raise there is that when flash memory involves a new memory cell structure....and even old resistence change mechanisms at new geometries....doesn't that need stringent reliability data too.

Just because something worked reliably at 90-nm and 50-nm doesn't mean it will at 19-nm and 16-nm.

For a start NAND flash cycling endurance is reducing rapidly

And different unintended consequences could be coming into play at each node.

 

 

 

DrFPGA
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Re: Seems Like Reliability will be the Big Test
DrFPGA   8/6/2013 9:56:01 AM
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Good point that all technologies need to be tested as they progress to smaller geometries or structural changes (like multi-level cells). Flash does have a long history however and the TECHNOLOGY is well understood.

A new technology will have a longer learning curve and most users (to my thinking) will require more compelling test and qualification data in order to feel comfortable using new devices. Just the reality with a new device made on a new technology.

resistion
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Re: Seems Like Reliability will be the Big Test
resistion   8/6/2013 10:32:24 AM
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I meant to agree with you strongly earlier but got off on some other perspective. Yet there are some assumptions of 100% reliability like DRAM endurance, and there are not even attempts to plot let alone extrapolate a trillion cycles or more. Surely this assumption (or any) must always be challenged!

selinz
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Re: Seems Like Reliability will be the Big Test
selinz   8/6/2013 11:54:05 AM
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The actual technology qual isn't going to take several years but the iterations will. I'm guessing that if they've fab'd a 1K structure, they've already started doing accelerated life testing on each "generation" to learn the primary failure mechanisms. You shouldn't excpect to see that kind of information published for quite some time as this feeds back into the heart of their technology development.

Peter Clarke
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Re: Seems Like Reliability will be the Big Test
Peter Clarke   8/7/2013 8:56:14 AM
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1K by 1K array is a 1-Mbit array -- manufactured on 110-nm process.

But there is still some ways to go

to get to Gbit arrays on 20-nm.

 

resistion
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