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8/5/2013 11:02 AM EDT
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nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 10:14:59 AM
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Manager - I just noticed your question about the diode.

We consider using the diode only in 3D, not in the planar mode - although there is nothing impeding that. The diode for us is aspecial layer within our doping scheme, but not inside the two electrode areas of the device. It is under the bottom electrode. The window from -V to +V is about 1.4 volts, clearly allowing the -V/2 to +V/2 array pulsing without cross talk for the array-only large scale memory. As we write at 0.6,1.2 and read around 0.1-0.2 volts, this is not a problem, as both of these voltages divided by 2 are within the non-disturb window. Our device would look like the 3D version of Samsung, in which they use the diode made of Vanadium Oxide as a varistor. But, we do not have anything foreign to add to our process like that. Besides NiO, all materials are already in the fab.

nonvolatile
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Re: "CBRAM" Interesting
nonvolatile   8/7/2013 10:07:01 AM
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Manager - I clearly understand that these are bold claims. And for that reason we only published 3 papers on this as we were awaiting for patents to issue. Thank you for your references on TMO - we have a library with about 7000 articles within our group.

I will try to answer your questions and clarifications, but if they do not satisfy you, then, write me again.

(1) TMOs are materials with incomplete 3d energy levels. In NiO, the NaCl lattice in fact has a unit cell that is Octahedral of the MO6 coordination. That is 1 Nickel anion and six oxygen cations, creating the NiO complex. Since 1937 that it is well known that NiO and transition metals oxides in general do not follow the Bloch-electron/Wilson's band theory. The reason is that in the case of Ni, the poster child of this observation, the next shel, 4s, in this case actually has no effect in bonding and leaves the 3d8 orbitals to interact with the oxygen 2p states. What then happens is a nature driven "disproportionation" a big word that means that the material goes simultaneously through an oxidation-reduction reaction in a single site. In the case of NiO, this is the reason why typically the native state of NiO is an insulator, when in fact, according to band theory, it should be a metal. Sir Neville Mott usesd NiO as the example of a electron density driven phase transition. The simple way of showing this is to show this reactio (the disproportionation): 2Ni(+2)O)-2)---Ni(+3)O + Ni(+1)O. In simple terms, the native "NiO" is the equation's right side, which splits the 3d8 state into two separate states "3d7 and 3d8" - a gap caused by this splits is called a Hubbard U gap (technically and specific to NiO this is not exactly the key gap, but for this discussion it surfices). For many years since 1957, studies of all TMOs for metal-to-insulator phase transitions, including a zillion theoretical paers entered the literature. Now, what is important here is that the Ni species that I showed above are in the lattice, and not a bunch of different oxidation numbers that do not participate in the disproportionation. Let me explain, Take any reference on NiO ReRAM, (or other TMO), and you will see the XRD spectra with Ni(0) and Ni(+4). These become "dead" clusters that sit there and together with oxigen vacancies make the mess that kilss reliability. When vacancies move, atoms also move etc. This is the idiotic TiOx "memristor" which is truly the parasitic device in all ReRAMs. Carefull look at "Coordination Chemistry" will show that oxigen is not the only Ligand of a Transition metal. Many others occur, and the most common one and easily incorporated in the sources (proprietary part-can't say of what deposition equipment) is Ni(CO)4 which at 60 C makes Ni5(CO)10 stable complexes. Loking at this the "CO" doping is novel and we patent it in every important country - including china. All patents now issued so we are starting to transfer this to industry with example devices. So, the trick in all TMOs is to control the "coordination sphere around the metal anion" to force the oxidation number to stay ameanable to the phase transition from metal to insulator and vice versa. This is the "Novel" doping technique.

(2) All  complex oxides need to be annealed - this is not to be confused with "forming, such as Electroforming", but it is not wrong to say "forming" in the sense that annealing forms the proper crystalline phase.  The annealing temperature for us is between 390-450" - typically 400. A key point is that the device is 60 nm or less in thickness, but done in 3 layers of different conductivity(doping levels) such that the possible schottky barriers at the contacts are screened and space charge is reduced. Then, the active area in the middle is 20 nm thick or less.

(3) The "electroformed ReRAMs" out there, start with a sputtered and then partially oxidized TNO. They use Platinum because the connect/disconnect of a filament uses the myriad of oxidation numbers within the space chrge region. Because the definition of a "Mott insulator" is that each ion has an independent transiton (In the language of the trade it means "The self-energy is position independent"), eventually a sporadic reaction occurs in the highly deffective surface that closes or open the contact to the filament - this also happens near grain boundaries internal to the device. Now, the off state of such a device is very sensitive to temperature and dwell time of the write pulse. If tested by pulsing and then raise the temperature and repeat, all these ReRAMs will show an activation enerfy of around 0.43 eV (NiO) which is exactly electron detrapping. Thus, ReRAM with filaments are really a charge trap device. We call our device CeRAM - Correlated Electron RAM, to separate ourselves from the filament crowd. The electron-electron repulsion inside 3d is found in the right side of the chemical equation and the metal-like in the left side. Papers using pressure to achieve the Metal/insulator transition are all over the literature. But, pressure corms the metal side, due to wavefunction overlap, and releasing it forms the insulating phase. The same can be accomplished by mesoscale devices and electron injection - too much detail to explain here. In any case, devices that are "ligand Compensated" work beautifully right out of the oven - No electroforminf, no filaments.

(4) Your reference to IBM is partially correct. In their case, they use the field effect to do what is called "electrostatic doping" But, this FET is full of problems and I do not want to bore you.

I am not in a position to give our company name at this time, but you can use my personal email - caraujo@aol.com

Regards

Ron Neale
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Re: CBRAM Not really
Ron Neale   8/7/2013 9:38:24 AM
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Jaybus0-When trying to locate (guess) where the built-in diode is I looked at the case of bridging filaments. In that case I think you come to the conclusion that the diode would have to be formed at the touching junction of the tip of the silver filament and the polycrystalline electrode and that would be a Shottky barrier diode. However if you assume the bridge is not complete then you have a couple of options either again a Shottky along the surface of the silver electrode and the tip of the filament, or a conventional pn aSi-polysilicon diode at the crystal electrode interface. Or if a doped amorphous silicon involved in a two part a-Si structure that is another possible location formed by an amorphous pn diode.  We will see.

 

 

Ron Neale
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Re: "CBRAM" Interesting
Ron Neale   8/7/2013 9:00:59 AM
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Nonvolatile you are making some extremely interesting and bold claims. I think It would be useful if you would clarify some of the following. "It has the mechanism of electron correlations which is common in Transition Meatl Oxides (TMO) in a controllable way via a novel doping technique that corrects disruption in the oxidation number of the transition metal, thus allowing an ohmic state right after annealing without any electroforming step."

Without the proprietry detail could you clarify what you mean by a novel doping technique and is the annealing (forming) part of the fabrication process?

Also are you claiming an isolating diode as an inherent part of the structure?

I know IBM have been looking at modifying the conductivity of vanadium oxide by introducing ions and extracting them that does something similar to what you are claiming and they could claim this is a novel doping technique, but it does involve movement. I will dig out the reference.

Can you name the company that is covered by the word "we"?

Couple of refs transition metals from my archive notes

http://domino.research.ibm.com/tchjr/journalindex.nsf/c469af92ea9eceac85256bd50048567c/b5cffeae5b717b4a852574a60078c734!OpenDocument

http://domino.research.ibm.com/tchjr/journalindex.nsf/c469af92ea9eceac85256bd50048567c/b5cffeae5b717b4a852574a60078c734!OpenDocument

 

 

Peter Clarke
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Re: Seems Like Reliability will be the Big Test
Peter Clarke   8/7/2013 8:56:14 AM
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1K by 1K array is a 1-Mbit array -- manufactured on 110-nm process.

But there is still some ways to go

to get to Gbit arrays on 20-nm.

 

jaybus0
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Re: CBRAM Not really
jaybus0   8/7/2013 8:24:58 AM
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Whether or not the Ag filaments have to bridge is a good question. I was under the impression that the length and number of Ag filaments locally affected the resistivity of the switching medium so that the resistance between top and bottom electrodes varied. But of course that could also be dependent on the number of filaments that are fully bridging at any one time. 

The market is for non-volatile memory, but I wonder if it could not be used as a very dense and low power artificial neural network chip.

 

nonvolatile
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Re: "CBRAM"
nonvolatile   8/7/2013 8:01:30 AM
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I completely agree - It is CBRAM with amrphous Silicon electrodes. May 31st, 2011 issue of Journal of applied physics shows NiO resistive memory without filaments or electroforming. We are introducing this technology in 2 months. It is fully compatible with lithography down to 20 nms and can go lower. It is free of complicated contact materials such as Pt. It uses Al, cobalt silicide and nickel silicide. Anneals at 400 C and is integratable in 3D using same electrodes with an already proven diode. The storage temperature is 400 C and the R/W is in the picoseconds. Blue Sky? not really, it is common sence to try to dope NiO instead of breaking it with filaments. This silver filament growth and others with filaments such as standard NiO ReRAMs, ignore the most fundamental aspect of a good memory - do not depend on mass transport - it is electrochemistry at the nano level - anything can go wrong. Read the 3 papers on this - the cover of the journal shows this concept which we quietly built in the last 6 years. It has the mechanism of electron correlations which is common in Transition Meatl Oxides (TMO) in a controllable way via a novel doping technique that corrects disruption in the oxidation number of the transition metal, thus allowing an ohmic state right after annealing without any electroforming step. Writes in 0.6V and 1.2 volts. Reads well above 1E13 without any performance problem. This "commercial" is simply because I am sick and tired of these "electrochemical" approaches claiming to solve all problems, when in fact, the beauty of Metal/Insulator physics is not utilized. 

selinz
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Re: Seems Like Reliability will be the Big Test
selinz   8/6/2013 11:54:05 AM
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The actual technology qual isn't going to take several years but the iterations will. I'm guessing that if they've fab'd a 1K structure, they've already started doing accelerated life testing on each "generation" to learn the primary failure mechanisms. You shouldn't excpect to see that kind of information published for quite some time as this feeds back into the heart of their technology development.

resistion
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Re: Seems Like Reliability will be the Big Test
resistion   8/6/2013 10:32:24 AM
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I meant to agree with you strongly earlier but got off on some other perspective. Yet there are some assumptions of 100% reliability like DRAM endurance, and there are not even attempts to plot let alone extrapolate a trillion cycles or more. Surely this assumption (or any) must always be challenged!

DrFPGA
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Re: Seems Like Reliability will be the Big Test
DrFPGA   8/6/2013 9:56:01 AM
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Good point that all technologies need to be tested as they progress to smaller geometries or structural changes (like multi-level cells). Flash does have a long history however and the TECHNOLOGY is well understood.

A new technology will have a longer learning curve and most users (to my thinking) will require more compelling test and qualification data in order to feel comfortable using new devices. Just the reality with a new device made on a new technology.

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