Not long after the Exascale meeting, the prototype came back from the fab. It didn't work. Keeth said:
Assumptions we made were wrong, so we had to adapt the design to the sheer number of TSVs [required as well as] back-end jobs in thinning and stacking wafers. Our TSV technology when we started was not geared to solve this problem, so we had to get support from the company to [develop a capability to] handle thousands of interconnects from die to die.
Specifically, "the TSVs in the logic layer didn't show up as planned, so we had to restructure how we put the Cube together to get a functional prototype -- there was some reactionary engineering that was well executed," recalled Jeddeloh.
The Cube required thousands of TSVs, many more than Micron used on past CMOS imagers.
Engineers spent most of 2008 figuring out a way to get the TSVs to connect the logic die to the DRAM stack so the memories could get the power they needed.
Ultimately they created a "larger than life, sacrificial logic die bound down to a substrate, then put the DRAM stack underneath it" rather than on top as originally envisioned, said Keeth. The two parts were placed "in a ceramic package with a cavity containing the logic on top, close to lid so power from solder balls on the logic die could connect easier, face-to-face, using a bridge network with balls to bring power," he said.
It was "a monumental recovery -- a big catch in the end zone that salvaged the program," he added.
"That all got us through the gate, showing our ability to build TSVs with yield and thin the wafer stacks," said Jeddeloh. "At that point, we got approval to build the first actual product, the Gen-2 design" now sampling to first customers.