Breaking News
News & Analysis

TSMC taps ARM's V8 on road to 16 nm FinFET

10/16/2012 09:21 PM EDT
14 comments
NO RATINGS
Page 1 / 2 Next >
More Related Links
View Comments: Oldest First | Newest First | Threaded View
Page 1 / 2   >   >>
rick merritt
User Rank
Author
re: TSMC taps ARM's V8 on road to 16 nm FinFET
rick merritt   10/16/2012 11:31:30 PM
NO RATINGS
I'd love to hear any real world experiences dealing with chip designs that use double patterning. I hear it ain't easy.

resistion
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
resistion   10/17/2012 12:56:10 AM
NO RATINGS
Intel has used double-exposure techniques for its alternating PSM patterning for the poly gate layer starting at 65 nm. Probably multi-patterning on a few layers should be nothing to them now. The question is if they can handle additional layers such as metal 2/3 requiring double patterning.

any1
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
any1   10/17/2012 1:50:22 PM
NO RATINGS
Double patterning does add a significant amount of complexity to the entire process. And those companies that can do it well will be rewarded. This is where the more vertically integrated companies like Intel and Samsung have an advantage since they can control everything in house. I'm amazed that the foundries like TSMC can execute as well as they do now. But integrating FinFETs, etc. will only make it even more complex to manage in the future. Getting first pass success will become more difficult, and the number of designs at the leading edge will become fewer. Both of these trends are being acclerated by the requirements (costs) of double patterning.

chipmonk0
User Rank
Manager
re: TSMC taps ARM's V8 on road to 16 nm FinFET
chipmonk0   10/17/2012 3:48:22 PM
NO RATINGS
Rick : Couple questions about the TSMC 2.5-D Test vehicle you have reported. What was the footprint of the whole thing ( with 4 chips ). Did they give any reason why such a 2.5-D module will be better than current modules / packages used in Smart Phones / Tablets ? Thx

chipmonk0
User Rank
Manager
re: TSMC taps ARM's V8 on road to 16 nm FinFET
chipmonk0   10/17/2012 3:49:17 PM
NO RATINGS
Rick : Couple questions about the TSMC 2.5-D Test vehicle you have reported. What was the footprint of the whole thing ( with 4 chips ). Did they give any reason why such a 2.5-D module will be any better than current modules / packages used in Smart Phones / Tablets ? Thx

resistion
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
resistion   10/17/2012 9:48:15 PM
NO RATINGS
Worse yet, at least some expect 10 nm may require double patterning even for EUV. http://semimd.com/blog/2012/09/17/will-euv-miss-another-node/ And still worse yet, the EUV throughput is still far short of target, so ASML has acquired Cymer. Apparently, they've scuttled their other EUV source vendor options. http://semimd.com/blog/2012/10/17/asml-to-acquire-cymer/

resistion
User Rank
CEO
re: TSMC taps ARM's V8 on road to 16 nm FinFET
resistion   10/17/2012 10:36:45 PM
NO RATINGS
With a wavelength of 13.5 nm and NA of 0.33, 10 nm corresponds to k1 less than 0.25, so indeed the current NXE:3300 won't be useful for very long.

rick merritt
User Rank
Author
re: TSMC taps ARM's V8 on road to 16 nm FinFET
rick merritt   10/18/2012 12:15:41 AM
NO RATINGS
Intel's Mark Bohr has already said he is considering quad patterning immersion at 10nm. See http://www.eetimes.com/electronics-news/4396146/Intel-sees-quad-patterned-path-to-10-nm-chips

rick merritt
User Rank
Author
re: TSMC taps ARM's V8 on road to 16 nm FinFET
rick merritt   10/18/2012 12:17:16 AM
NO RATINGS
They did not give size of the chip. But Hou did say the test run with Wide IO was only to test out the various aspects of the process and the Wide IO IP which would actually be used with a through silicon via stack in commercial chips.

rick merritt
User Rank
Author
re: TSMC taps ARM's V8 on road to 16 nm FinFET
rick merritt   10/18/2012 12:17:55 AM
NO RATINGS
Oh, and the TSVs are supposed to provide much greater bandwidth than today's wire bonded stacks

Page 1 / 2   >   >>
Most Recent Comments
rick merritt
 
MeasurementBlues
 
vvc0
 
zeeglen
 
Max The Magnificent
 
Max The Magnificent
 
vvc0
 
Max The Magnificent
 
arno_x
Radio
NEXT UPCOMING BROADCAST
EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
Top Comments of the Week
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Flash Poll