Intel jump started the FinFET approach with its new 22-nm tri-gate process, but it is not delivering on its promise, asserted an IBM process technology expert. Intel’s Ivy Bridge chips made in the process deliver just 20 percent power reductions compared to 35 percent drops with the former node, said Ghavam Sahidi, a fellow at IBM Research.
“The real numbers are not very impressive, IBM got much better numbers and Intel’s own 45- and 65-nm numbers were better,” he claimed.
Sahidi blamed parasitics that resulted from Intel’s decision to dope the FinFET structures. “If they go down this path to 14 and 10 nm of doping, it gets worse--you have to be un-doped,” Sahidi said.
Thompson of SuVolta agreed. “I think Intel went down a path of un-doped fins, but I think they couldn’t solve their problems, so they went into production with doped fins and sloped horribly,” Thompson claimed. “I think that structure will not give the power or performance people expect and the right thing to do is an un-doped fin,” he said.
Intel will need un-doped FinFETs to support multiple threshold voltages needed for the analog circuits key to mobile SoCs, Thompson said. He predicted Intel might try such a move at its 14-nm node.
Thompson suggested only high performance processors and FPGAs will need FinFETs. The growing class of mobile chips will be served by planar 28 nm or older processes. “We are leaving a big chunk of market behind,” he said.
Others disagreed. “FinFETs will last a long time, and I certainly expect the next generation to be better than the current one,” said Chenming Hu, a professor at the University of California at Berkeley and a former chief technologist at TSMC. “I would not say FinFETs will go to the end [of CMOS scaling] because a better way is to think of using many building blocks--it doesn’t have to be one."
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