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TSMC process in trouble, says analyst

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1/20/2012 11:25 AM EST
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resistion
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re: TSMC process in trouble, says analyst
resistion   1/20/2012 1:00:08 PM
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If Samsung 28 nm really pulls it off for Apple A6, that's a lot of pressure on TSMC for sure.

me3
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re: TSMC process in trouble, says analyst
me3   1/20/2012 4:28:27 PM
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They are not in trouble as long as there is no REAL alternatives. People whine about foreign oil but foreign monopoly on chip production is just as big a threat.

KB3001
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re: TSMC process in trouble, says analyst
KB3001   1/21/2012 10:46:38 AM
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It's not as big a threat perhaps but very close indeed.

the_floating_ gate
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re: TSMC process in trouble, says analyst
the_floating_ gate   1/20/2012 5:29:04 PM
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"People whine about foreign oil but foreign monopoly on chip production is just as big a threat." You make an excellent point; I believe INTC's (surprise) increase in capex is probably geared towards 450 mm wafer processing and quoting the "Godfather" Intel might make Apple an offer they can not resist. 2011 was very unique year exposing risks related to offshore outsourcing. I can think of Apple and Intel working together to create a best of breed SoC (manufactured at 450 mm). IMHO too many US based fabless chipmakers are competing for advanced technology capacity. An usually a foundry process is more or less a one size fits all process - it's probably good but not as perfect as it could be finetuning all parameters for one specific customer. Yield data is usually top secret info but TSMC is ramping up BIG time (for TSMC standard) in Q1 2012 - however TSMC added almost no additional 300 mm capacity in second half of 2011 according to TSMC quarterly report: According to latest quarterly report TSMC added 92 units of 300 mm wafer starts in 2011; in Q1 2012 alone TSMC is adding 71 units of 300 mm wafer starts (Fab 12, Fab 14). So TSMC is playing catch up but according to ASML who keeps excellent track of what is going on at customer base TSMC's capacity additions for 28nm are far away from what would be required to make 28nm main stream. So I would not write off TSMC prematurely but I just can't see someone like Apple continue to depend on TSMC when 450 mm becomes mainstream. And Samsung is becoming more and more a competitor for Apple.

mike655mm
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re: TSMC process in trouble, says analyst
mike655mm   1/20/2012 10:54:41 PM
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450mm is a cost reduction measure that squeezes more die on a wafer. It has nothing to do with "technology" leadership. It's the transistor dimensions and die size that are important. 22nm & 14nm will be on 300mm before they bring up 450mm.

Lsweep
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re: TSMC process in trouble, says analyst
Lsweep   1/20/2012 6:19:02 PM
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Time for Apple to engage with Intel re mobile?

the_floating_ gate
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re: TSMC process in trouble, says analyst
the_floating_ gate   1/20/2012 7:23:52 PM
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Apple picked up a "ton" of WiFi related IP from Freescale over the last six months or so - obviously it's patented but would you be comfortable to disclose this kind of knowledge with someone like Samsung who is direct competitor? I certainly would not. Jun 6, 2011 Ė Intel CFO Stacy Smith is on record saying that combining other chip design IPs with Intel's architecture core "would be fantastic business for us. ...

DF0
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re: TSMC process in trouble, says analyst
DF0   1/20/2012 11:27:45 PM
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Well, if TSMC can't make a lot of good 28nm dice, then that probably explains why AMD's cancelled most of their 28nm Fusion products (Deccan/Wichita, etc.). Better to use them to make high ASP GPUs than low-ASP APUs.

_hm
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re: TSMC process in trouble, says analyst
_hm   1/21/2012 1:26:47 AM
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I would like to know specific faced by TSMC. They may soon resolve problem and aim for 22nm.

seaEE
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re: TSMC process in trouble, says analyst
seaEE   1/21/2012 2:21:46 AM
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Moore meets his friend Murphy.

KB3001
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re: TSMC process in trouble, says analyst
KB3001   1/21/2012 10:48:20 AM
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While problematic, TSMC have enough of a capital cushion to withstand such losses.

me3
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re: TSMC process in trouble, says analyst
me3   1/21/2012 3:38:42 PM
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"While problematic, TSMC have enough of a capital cushion to withstand such losses." That is the problem. The big three have enough capital cushion for anything. They have no need for innovation except for their own. You have to turn to FTC to get anything, like in the Univ. of New Mexico vs. TSMC case. It is killing the ecosystem.

andyroyduh
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re: TSMC process in trouble, says analyst
andyroyduh   1/21/2012 8:57:46 PM
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No mention of UMC 28nm in this article, but EE Times article from last year indicated TI using UMC as their lead foundry for 28nm. I assume other chip companies have similar multi-source foundry strategies. http://www.eetimes.com/electronics-news/4214774/Upset-TI-slams-Samsung-s-foundry-efforts It will be interesting to see which foundry can work out thier 28nm yield issues first and how this translates to application processor and GPU market share in 2013. Andy

mranderson
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re: TSMC process in trouble, says analyst
mranderson   1/23/2012 4:28:47 AM
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I think we may potentially see many fabless semiconductor companies talk about moving to UMC and/or Samsung for 22nm if TSMC has a setback at 28nm. But much of this will be idle talk to try and get TSMC to lower prices since nobody else has enough production capacity at this point. Most 28nm designs simply are not ready for production level tapeout since the process and IP are immature for 2011 and 2012. I suspect much blame also resides within TSMC's customers for the failure since just about everyone does test chips on new processes for characterization before launching production designs.

resistion
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re: TSMC process in trouble, says analyst
resistion   1/23/2012 1:52:41 PM
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It looks like xilinx was really happy with tsmc 28 nm, so it's probably rushed designs that's the problem. http://www.electronicsweekly.com/blogs/david-manners-semiconductor-blog/2011/11/will-28nm-be-a-good-node.html

Oscar Law
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re: TSMC process in trouble, says analyst
Oscar Law   1/23/2012 3:28:24 PM
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Since most of the large fabless companies are satisfied with TSMC 28nm process, the low yield issues of some companies are potentially due to design related process issues. It can be fixed by design/process expert after review the layout.

chipmonk0
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re: TSMC process in trouble, says analyst
chipmonk0   1/23/2012 6:41:30 PM
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Samsung stays ahead of TSMC in this regard because they always start a new node with memory before going to processors. For memory Samsung is already at 20 nm. Samsung's A6 for Apple is already at 28 nm ( only in Austin, NOT So. Korea ) In the last few years TSMC has come through as being a little too cocky about their market share and at Technical Conferences sounded almost "Big Brother" ish. Samsung's spending of 10s of billion $ in 2012 does not bode well for TSMC lead in Foundry. In fact TSMC is already out in the public back pedalling on their CapEx siting low growth in demand. What happens now if nVidia or even Qualcomm ( current large customers of TSMC ) now jump ship ( Samsung, even Intel ?? ) in order to stay competitive with A6 Quad Core ?

cxy11
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re: TSMC process in trouble, says analyst
cxy11   1/24/2012 7:57:45 AM
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Interesting comments: TSMC 28nm Yield called into question? Again? Really? http://www.semiwiki.com/forum/f2/tsmc-28nm-yield-called-into-question-again-really-1264.html

IFTLE
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re: TSMC process in trouble, says analyst
IFTLE   1/24/2012 8:51:22 PM
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Anyone know whether the Samsung is designing the A6 with 3D and TSV or not. Supposedly the 28 nm respin by TSMC was to incorporate this. Is Samsung doing the same ??

Robotics Developer
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re: TSMC process in trouble, says analyst
Robotics Developer   1/26/2012 12:14:26 AM
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It sounds like there is no clear story here, one says no yield and another says on target for defect density. It could mean the 0% yield is on track with what they expect for defects at this point. I am sure that they are closing guarding the real numbers. Only time will tell, I am rooting for success as it can only help drive costs down overall in the market.

PV-Geek
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re: TSMC process in trouble, says analyst
PV-Geek   2/11/2012 10:02:44 PM
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Regardless of the truth of the details, 28nm has been a real challenge, particularly in the initial ramp up phase. This is more sanely evidenced in the increasing amount of DFM activities being pushed to the designer at these nodes. Things like litho checking, smart fill, pattern based checks, and restricted design rule checks have migrated from recommended to required. This is evidence enough that many of the second and third order effects on yield are becoming first order. Strict adherence and effort spent optimizing these DFM issues in the design phase is probably what is causing such different results on different chips. All designs are not the same from a DFM perspective.

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