Breaking News
Design How-To

The Future of NOR flash memory

Shared memory bus results in lower active signal counts
NO RATINGS
< Previous Page 2 / 3 Next >
More Related Links
View Comments: Threaded | Newest First | Oldest First
JanineLove
User Rank
Blogger
re: The Future of NOR flash memory
JanineLove   5/2/2011 12:45:45 PM
NO RATINGS
Spansion will be presenting a version of this paper this week at ESC. If you have any questions for the author, feel free to post a comment below.

ManasK.RayChaudhuri
User Rank
Rookie
re: The Future of NOR flash memory
ManasK.RayChaudhuri   12/7/2011 4:41:56 AM
NO RATINGS
Please give a detailed presentation & not a sketchy one.

resistion
User Rank
CEO
re: The Future of NOR flash memory
resistion   5/2/2011 3:26:51 PM
NO RATINGS
Good to see an assertion of NOR applications. But is the market size large enough to drive any significant usage changes?

Cliff.Zitlaw
User Rank
Rookie
re: The Future of NOR flash memory
Cliff.Zitlaw   5/3/2011 5:59:01 PM
NO RATINGS
One significant NOR usage change is the continuing proliferation of high density SPI. As a NVM product catagory, NOR revenue is more than adequate to fund next generation process development and new product catagories.

cdhmanning
User Rank
Rookie
re: The Future of NOR flash memory
cdhmanning   5/2/2011 7:02:02 PM
NO RATINGS
Read, read, read... No mention of write. Has NOR write time improved or is it as bad as it always has been?

Cliff.Zitlaw
User Rank
Rookie
re: The Future of NOR flash memory
Cliff.Zitlaw   5/3/2011 6:12:51 PM
NO RATINGS
We have made significant improvements in programming performance. Spansion's GL-S product family programs at 1.2MB/s compared to the previous generation GL-P programming rate of 130KB/s.

nosubject
User Rank
Rookie
re: The Future of NOR flash memory
nosubject   5/2/2011 8:29:44 PM
NO RATINGS
In the last comparison, 100MHz NOR bus rate (16b bus) 50MHz NAND bus rate (8b bus) Why don't use the same freq and bus width to do comparison?

tb1
User Rank
Rookie
re: The Future of NOR flash memory
tb1   5/2/2011 11:05:06 PM
NO RATINGS
NAND parts typically don't come with a 16 bit bus and their bus rate is typically slower than the NOR parts. So the comparison seems to take these differences into account.

cdhmanning
User Rank
Rookie
re: The Future of NOR flash memory
cdhmanning   5/3/2011 10:35:48 PM
NO RATINGS
16 bit buses are quite common on NAND.

Cliff.Zitlaw
User Rank
Rookie
re: The Future of NOR flash memory
Cliff.Zitlaw   5/3/2011 6:03:24 PM
NO RATINGS
I tried to use a typical usage case scenarios. As tb1 mentions x16 NAND is getting hard to find and commands a significant price premium. Note that even if the NAND transfer time were eliminated altogether the NOR:NAND comparision would be 50:1.

cdhmanning
User Rank
Rookie
re: The Future of NOR flash memory
cdhmanning   5/3/2011 10:41:30 PM
NO RATINGS
I think the major flaw in that argument is that NAND and NOR are typically used for very different purposes and there are very few typical user scenarios for both beyond holding boot code/data. Trying to compare them is like trying to compare a Ford F250 with a Porche. NAND is prefered for general r/w file system usage - for which NOR is pretty terrible. NOR is prefered for boot code and data, but many systems are dropping the NOR and using NAND to reduce costs. That slows boot, but is a compromise.

hank.carey
User Rank
Rookie
re: The Future of NOR flash memory
hank.carey   5/3/2011 5:21:17 PM
NO RATINGS
Posted article was truncated. From the concluding sentence: "...pin count interfaces, long product life cycles and superior..."

JanineLove
User Rank
Blogger
re: The Future of NOR flash memory
JanineLove   5/3/2011 5:34:16 PM
NO RATINGS
Fixed! Thanks for letting me know.

t.alex
User Rank
Rookie
re: The Future of NOR flash memory
t.alex   5/7/2011 12:43:00 AM
NO RATINGS
Is there any chance NOR will replace NAND in the near future?

Cliff.Zitlaw
User Rank
Rookie
re: The Future of NOR flash memory
Cliff.Zitlaw   5/13/2011 3:49:36 PM
NO RATINGS
NAND array architecture is fundamentally more efficient (bits/area) than NOR at a given process node. This array efficiency advantage outweighs NOR's smaller peripheral area as densities increase. From a silicon cost perspective NAND will always be less expensive at the highest densities, NOR will always be less expensive at the lowest densities. So from a cost perspective both NOR and NAND will continue to be viable for the foreseeable future. From a performance perspective both technologies have characteristics that are essential in different applications. (NOR - low latency reads, NAND - fast program/erase rates)

leosteinfeld
User Rank
Rookie
what about consumption?
leosteinfeld   9/26/2013 4:41:55 PM
NO RATINGS
Hi,
I'm interested in Flash energy consumption to complete a fair comparison between different technologies (particularly in NOR and NAND Flash, SRAM). This parameter is normally disregarded in books and so on. Please could you give any clue on orders of magnitude of the static consumption (specified as current/power leakage) and dynamic consumption during random read operation.
Best regards,
Leonardo

Flash Poll
Radio
LATEST ARCHIVED BROADCAST
EE Times editor Junko Yoshida grills two executives --Rick Walker, senior product marketing manager for IoT and home automation for CSR, and Jim Reich, CTO and co-founder at Palatehome.
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed