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Apple M7 From NXP, Says Chipworks

First looks at the Apple A7
9/20/2013 00:00 AM EDT
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rick merritt
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More to come
rick merritt   9/20/2013 5:09:47 PM
I see iFixit says the fingerprint sensor is a Touch ID chip from Authentec which Apple acquired.

Any surprises in the data that's now dribbling out?

chipmonk0
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impact of 64 bit
chipmonk0   9/20/2013 5:40:51 PM
Noticed denser interconnects in the A7, perhaps to accommodate the 2x wider ( 64 bit ) data and address buses within more or less the same real estate. Chipworks could go back and take one more look at their teardown of the Exynos 5 ( 32 bit 8 core ) in the Samsung S4 phone and compare the interconnect w/ the A7 ( both 28 nm by Sam ). Performance can actually take a hit if interconnect conductors & dielectrics are shrunk too much since resistance & capacitance will go up and will become a larger factor as the transistors get faster & more efficient.

rick merritt
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Re: impact of 64 bit
rick merritt   9/21/2013 10:36:50 AM
Nice point, Chipmonk. Chipworks: Hope you heard this!

fmotta
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Re: impact of 64 bit
fmotta   9/23/2013 11:54:36 AM
Chip performance is important and. up to a certain stage multi-core matters.

But, I think that without a reasonable solution for managing the non-parallelizable fraction as described by Gustafson (http://en.wikipedia.org/wiki/Gustafson%27s_law) one cannot get reasonable scaling when the core count exceeds a point (last check it was 4 cores and at 8 one gets diminishing returns for SMP).


So, if SMP is used for more than 4 cores there is a liklihood that we are back to speed fro value. Of course, if there are some dataplane cores that are not within the SMP cluster then they can be removed from the parallizable portion provided they have a reasonable "look-aside" interaction with the other cores.  However, that leaves the challenge of software syncronization.  A challenge that is really best left to hardware by using one of a few known soltions that include hardware managed elastic interface (like queues or free memory pool management).  Or a hardware scheduler can reduce the non-parallelizable portion if well implemented.  I do not believe either of these are available on any existing ARM SoCs yet.  I speculate that the interconnect/cross bar can be saturated on the 8 core design as well.

As a result, I think that the 2-64bit cores can perform well since it can gain from the larger register file.  With the right bit-wize or vector instructions against the 64bit registers then the value increases since more data is registered for one operation.

rick merritt
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Re: impact of 64 bit
rick merritt   9/23/2013 7:24:15 PM
@fmotta: Thanks for the interesting analysis.

ARM is implying a mix of big and little cores is optimal as you get beyond quad 32-bit. Has anyone heard any thinking about the optimal design points for mobile 64-bit multicore?

goafrit
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Re: More to come
goafrit   9/20/2013 9:24:16 PM
NO RATINGS
It is simply a mystery how Apple and Samsung could be competitors and best of customers. You have Samsung make A7 chip which is there to knock-out Samsung products in the market. A unique case for business schools.

AZskibum
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Re: More to come
AZskibum   9/20/2013 10:12:44 PM
NO RATINGS
It's not such a mystery when you consider how much money they each make from that customer-vendor relationship. If the relationship were to suddenly end, both companies would suffer.

daleste
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Re: More to come
daleste   9/21/2013 12:25:59 AM
NO RATINGS
It is hard to tell your best customer to get lost when you make a lot of money from their business.  The relationship will continue as long as it is in the best interests of both companies.

goafrit
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Re: More to come
goafrit   10/9/2013 10:27:48 PM
NO RATINGS
That is why most times I think the Apple Samsung rivalry is a media creation. How can you feed your enemy as Apple does with Samung if truly the latter is one?

Roadman0
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Andriod devices have similar devices as Sensorhubs
Roadman0   9/21/2013 4:26:03 AM
NO RATINGS
Andriod Devices such as Samsung S4 already have similar devices in them by companies such as Atmel

http://ir.atmel.com/releasedetail.cfm?ReleaseID=764171

 

Other products such as MotoX have it too.  In short this concept of having sensor Hub has been around, it is just not publized like Apple did.  I suppose this what one gets for inovation these days.

rick merritt
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Re: Andriod devices have similar devices as Sensorhubs
rick merritt   9/21/2013 10:35:44 AM
@ Roadman: Yeah it sounds like there was some heavy Apple marketing around this "custom M7." Not the first time there has been head spin!

rick merritt
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Re: Plenty More to come
rick merritt   9/21/2013 10:34:28 AM
Hi Tom,

Thanks for your efforts!

I'd encourage you to post here little nuggests that come up over the weekeend and send Susan Rambo and I at eet.com fuller dispatches as they emerge.

Best

rick.merritt@ubm.com

Scott Elder
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Re: impact of 64 bit
Scott Elder   9/21/2013 10:02:43 PM
@Tom - How did you determine that the NXP device shown is an LPC18xx device?

The A7 is about 10mm x 10 mm.  About 4 of the LPC18A1s fit along one A7 edge.  That means the device is about 2.5 mm x 2.5mm.  If you look at the ball count, it is 5 x 6 with a 0.35mm pitch which is about 2.5 mm x 2.5 mm.  A quick look at the datasheet shows the smallest LPC18xx is 100 balls with about 0.8mm pitch--nearly the same size as the A7.  Clearly the device shown on the board is not nearly the same size as the A7--maybe 5% the area!

The math doesn't add up.  Are you sure LPC18 and LPC18A1 = LPC18xx?

Scott Elder
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Re: impact of 64 bit
Scott Elder   9/21/2013 10:29:33 PM
@Tom - It seems more likely this is a Cortex-M0 given the size.  Still part of the LPC family, but at the low end.

elctrnx_lyf
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Re: impact of 64 bit
elctrnx_lyf   9/22/2013 7:26:27 AM
Does it mean a bad news for ST by losing the accelrometer sensor or is apple still continue with st and skm even with the separate nxp controller

Dick James
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Re: impact of 64 bit
Dick James   9/23/2013 9:59:09 AM
Hi,

We did some poking around on the NXP website, looking at their LPC range of products; and we couldn't find any specific part that matched the look of the LPC18A1, particularly the 30-ball WLCSP packaging. So we've come to the tentative conclusion that this is likely a customised LPC18xx chip built for Apple, similar to those we've seen from Dialog and Cirrus over the years (A1 stands for Apple-1?).

Could be M3, could be M0 (though the latter don't have the LPC18 prefix).

rick merritt
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Re: impact of 64 bit
rick merritt   9/23/2013 11:10:56 AM
This would support Apple's marketing claims that it is a custom chip (sorta).

rick merritt
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Re: impact of 64 bit
rick merritt   9/23/2013 7:22:23 PM
@Dick: Will you be decapping the M7 to find out more about wh9ich core it uses and etc?

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