Intel has already integrated onto its CPUs math coprocessors, memory controllers, graphics, I/O controllers, and now in-package memory with Knights Landing. Next will be high-speed switches, optical fabrics, next-generation storage, and 3D stacked memory CPUs. (Source: Intel)
One thing I forgot to mention is that the next-generation Xeon Phi will be implemented in Intel's 14-nanometer process technology--which should shrink the die even though the whole package may stay the same size or even grow depending on how many memory die are added is alongside the processor.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.