A provider of semiconductor solutions that accelerate packet processing for advanced network switches. IDT's Internet Protocol coprocessor designers are based in Atlanta, Santa Clara and Ottawa.

Latest project: Multiple 90-nm designs for packet-processing chips

Design team: Varies by project; six to 30 designers

Design tools: Primarily Synopsys tools.

Mark Baumann, director of engineering at IDT, seems pretty confident when he talks about 90- and 65-nm chip design. But the move to 90 nm has its own challenges, Baumann said. "Even moving to 130 nm we had a significant number of issues, because we were one of the first adopters.

"We are used to trying to bring up new technology nodes," he said. "We have our own internal set of things that we are concerned with and things that we double-check. I don't think the move to 90 nm was necessarily that much more difficult. There are just additional concerns that we had because we moved to 1 volt from 1.2."

IDT, Baumann said, has "a very good relationship with our tool vendors. When we come across an issue, we tend to contact them and ask them to use their resources to help us solve the problem. They have been very good about supporting us as we move from one processing node to the next."

Baumann said IDT's vendors indicate that toward the end of this year, they will be running 65-nm samples. "So I think that probably toward the end of next year is when we can start thinking about using 65 nm," he said.

"I know the EDA vendors are working on tools to meet our goals, but one of the concerns that we do have is IR drop," Baumann said. "There are tools like [Cadence's] Voltage Storm that are out there now that are great for dc types of looks at the design. But we really could use, and benefit by, the ability to run some vectors through our code and actually do a power analysis of the entire design."

'We are used to trying to bring up new technology nodes.'