TOOLS AND TECHNOLOGIES

Products and services for system design

Cell-based library A cell-based library for 0.5-ým devices has been announced by Symbios Logic Inc. The library, designated VS350, is based on a 3.3-V optimized, triple-level metal CMOS process, and is 20 percent faster than its predecessor, the 0.75-ým VS500. It contains 450 digital core cells and 180 core functional block, and supports designs with more than 400 kgates. Its drive strengths simplify logic synthesis and allow easier balance of power dissipation and performance. The library is expected to be useful in designing equipment for electronic data processing, communication, small computers, workstations, storage electronics, and automotive applications. (Symbios Logic Inc. was formerly known as the NCR Microelectronic Products Division of AT&T Global Information Systems.) Symbios Logic Inc., Fort Collins, CO. Contact Lea Schwartz, (970) 226-9550.

Reconfigurable computing Reconfigurable computing has been identified as a market opportunity for FPGAs. Xilinx Inc. (San Jose, CA), has announced plans to invest more than $20 million in market and product development for reconfigurable hardware. Reconfigurable computing uses FPGAs as computing elements with a general-purpose computer. Such machines are useful in image and audio processing, digital signal processing, database searching, and design automation. Software algorithms running on these machines have been accelerated by factors of up to 1,000. The technique is well known in scientific and academic communities, but has seen only limited commercial success. Developing commercial applications will require new FPGA architectures, new software, and new standards. To stimulate these applications, Xilinx has started a Reconfigurable Computing Developers Program to support its programmable-logic customers. The program offers discounts on Xilinx development systems, devices, and training, cash grants to assist development of reconfigurable hardware, promotional support, and access to reconfigurable computing libraries and files. Xilinx Inc. , San Jose, CA. Contact Evelyn Hart: (408) 879-5047.

Graphical system specification tool An electronic system design automation (ESDA) tool, Visual Verilog, has been introduced by Summit Design Inc. It is based on the graphical specification and debugging interface of Summit's Visual HDL. It represents the result of an agreement between Summit and Cadence to create an entry and debugging product integrated with Verilog-XL for simulating complex integrated circuits and systems. The VHDL simulator in Visual HDL has been replaced with an external simulator interface to Verilog-XL. Visual Verilog supports graphical entry of Verilog code with block diagrams, flow charts, algorithmic state machines, state diagrams, truth tables, gate-level schematics, and libraries of parameterized modules (LPMs). Summit Design Inc. Beaverton, OR. Contact Daniel Skilken, (503) 643-9281.

SIGLAB for Windows The latest version of SIGLAB for Windows (Version 3.5) can create and play back wave files through the Windows sound system. The product is a DSP simulation and analysis program that supports over 140 mathematical and system functions, including Fourier transforms, phase and group delay, convolution, statistical analysis, complex arithmetic, and others. The Athena Group, Gainesville, FL. Contact Monica Murphy, (904) 371-2567.

Galileo for Windows and Windows NT The Galileo Design Environment for field programmable gate arrays (FPGAs) is now available in Windows and Windows NT versions, in addition to the previously available Unix versions. It provides an integrated high-level design environment for simulation, synthesis, and timing verification. Its components include the HDL Logic Explorer, Hyper-Logic, Time Explorer, and Time Shuttle. Exemplar Logic Inc., Alameda, CA. (510) 337-3700.

High performance DSP design tools Software development support for the Texas Instruments TMS320C8x digital signal processor is now available for standard desktop computers. Developers of videoconferencing, electronic game, imaging and digital switching and networking equipment can design their DSP-based systems at less expense than previously, without purchasing workstations. The tools include code generators, a software development board, and emulation support. The tools run under Windows NT and will also be compatible with Windows 95 when it becomes available. Texas Instruments Inc., Semiconductor Group, Denver, CO, (800) 477-8924, ext. 4500.

IC-CAP modeling software A version of Hewlett-Packard's integrated circuit characterization and analysis program (IC-CAP) Modeling Suite achieves a higher level of automation than previous versions. The software provides three device models (for GaAs FET, GaAs HEMT, and BJT) and enhanced modeling capability. The latter combines instrument control, data acquisition, graphical analysis, simulation, and optimization into a flexible environment for efficiently and accurately extracting active parameters for modeling. Hewlett-Packard Co., EEsof, Westlake Village, CA. Contact Marketing, (800) 452-4844.

VHDL mixed-level fault simulator A fault simulator utilizing both register-transfer logic and structural implementations has been announced by IKOS Systems. The product, Voyager FS, delivers a software fault simulation with performance equaling or exceeding that of hardware fault accelerators. It uses the same vendor-certified ASIC libraries as its predecessor Voyager CS/CSX and Gemini CSX simulators. The software runs either on Sun SPARC workstations with Sun OS 4.xx or later, or on Hewlett-Packard HP9000 Series 700 workstations with HP-UX 9.xx or later. IKOS Systems Inc., Cupertino, CA. Contact Larry Melling, (408) 366-8522.

Noise simulator A Spice-based noise simulator for RF design has been introduced by DesignAid Inc., a producer of analog CAD tools. Traditional Spice (Simulation Program with Integrated Circuit Emphasis) simulates noise for a circuit at a fixed bias point, whereas the actual bias point of a circuit is likely to change from time to time. The product, called DesignAid for jitter, simulates time-varying, non-stationary noise effects. It can simulate mixers, oscillators, sample-and-hold amplifiers, and many other devices. It can also produce noise figure, phase noise, and timing jitter results that are critical in designing communication ICs for high performance. The program is based on recent research at the University of California, Berkeley, and does not use traditional Monte Carlo techniques. DesignAid Inc. Daly City, CA. Contact Edward W. Liu, (415) 992-9447.

Analog microcontroller A one-chip reconfigurable microcontroller, the AL-220, that provides dedicated, stand-alone control has been introduced by Adaptive Logic Inc. Employing fuzzy logic technology, the chip allows a designer to use it directly in analog control loops with no additional components and without resorting to separate fuzzy-logic software. It offers lower cost, higher speed, and simpler design than conventional microcontroller designs, which are not generally reconfigurable. In addition, development tools in the INSIGHT IIe system are available to assist in design development, simulation, real-time emulation, and programming. Fuzzy logic rules permit the designer to focus on the application instead of the coding. It is suitable for such applications as temperature control, motion and position control, and power management. Adaptive Logic Inc., San Jose, CA. Contact Chuck Bellavia, (408) 383-7200.

Windows EDA tools Synario 2.1, an updated version of a suite of Windows EDA tools, has been announced by Data I/O. The new version, a complete and fully integrated Windows-based system for PLD, FPGA, and board-level design, has enhancements to the graphical user interface and other features that make it easier to use. It allows both schematic and HDL entry and HDL simulation support, along with fully integrated vendor implementation tools, supporting a wide variety of device architectures and board and layout packages. The features include a tool bar and command palettes for the most common operations of the Symbol Editor, Schematic Editor, and Hierarchy Navigator. The command entry provides easy access to features such as schematic and symbol drawing, net naming, file access, zooming, and others. The result is increased throughput, decreased learning time, and improved ease of use. Data I/O, Redmond, WA. Contact Marketing, (800) 332-8246.

Automatic tester Megatest Corporation's Vega Series Model 400 test system is now in beta test with several customers in the U.S., using it on high-end microprocessors. This is the last step before the tester moves into full production; it allows selected customers to confirm that the product meets its design goals. The system is a characterization/production-level tester with strobe rates of up to 400 MHz and drive rates of up to 600 MHz. It uses a timing architecture that enables customers to program a broad range of event logic sequencing and to use a multitude of computer-aided design formats. The tester is available in field-upgradable configurations for devices from 32 to 384 pins, with either one or two test heads that can run in parallel. Megatest Corp., San Jose, CA. Contact Neal Shea, (408) 441-3034.

High-Speed Multimedia Tester A Multimedia Test Package for Teradyne's J971 Series VLSI Test System provides the technology, performance, and system integration needed for fast, accurate testing of very high-speed multimedia devices. It provides test solutions for devices that integrate analog and digital cells on a single chip. These chips require both the speed and resources of a digital test system and accurate analog test capabilities. To meet this challenge, the package comprises four options: a converter test option, a parametric measurement unit, a sampler, and a video test option. The Multimedia Test Package is integrated into the J971 test system, and is available as an upgrade to the test system. Teradyne Inc., Agoura Hills, CA. Contact marketing, (818) 991-2900.

Wafer stepper A high-productivity i-line wafer stepper, the PAS 5500/200, has been introduced by ASM Lithography. The stepper combines 0.35-ým resolution, high overlay accuracy, and special illumination modes that enable economical mass production of next-generation ICs. Its key component is a new type of illuminator that allows continuously variable, automatically selectable conventional and off-axis illumination modes. This illuminator combined with the projection system can deliver more than 1,300 milliwatts per square centimeter at the surface of a 200-mm wafer. This high intensity reduces exposure times, leading to throughput of more than 80 wafers per hour at 200 mJ/cm2. The machine's overlay performance matches 0.35-ým design rules; global overlay is 50 nm or less, while machine-to-machine overlay matching is 100 nm or less. ASM Lithography Inc., Tempe, AZ. Contact Mark Bigelow, (602) 438-0559.

Simplified synchronous-rectified buck regulators Monolithic ICs that integrate two MOSFETs, a half-bridge driver, and synchronous control on one die let designers of PCs and workstations deal simultaneously with two problems. They must step down 5 V DC to a lower voltage, such as 3 V; and at the same time support current demands that can change quickly from microamperes to as much as 10 amperes. They must meet both requirements without damaging the processor, while wasting a minimum amount of energy. The ICs, HIP5010 and HIP5011 SynchroFET chips, from Harris Corp., meet these requirements and thus simplify the design of step-down circuits. When combined with a simple pulse-width-modulation controller and an external inductor and capacitor, these chips permit the design of converters that operate with an efficiency of 90 to 95 percent. The two chips are functionally identical except for the input: a non-inverting PWM input for the HIP5010 and an inverting input for the HIP5011. Harris Corp., Melbourne, FL. Contact marketing, (800) 4-HARRIS, [(800) 442-7747], Ext. 7349.

integrated system design  September 1995