ASIC Issues

Market Windows as Design Parameters An analysis of time-to-market parameters for new products. by R.T. "Tets" Maniwa

Time-to-market is a primary concern for today's engineer. The world no longer allows the choice of any two out of the following three items: on-time, on-budget, meets-specifications. Today's new products must have all three criteria satisfied or the whole project is deemed unsuccessful.

The final product, not the beta version, in consumer products has to be ready for early demonstration. Consumer shows occur early in the year so the stores can order by July. In October, the manufacturers start ordering parts and setting up production to fill distributors' pipelines for the start of Christmas sales. For many consumer companies, the Christmas season can account for nearly 70% of a product's sales in a year; missing the window by as little as a month can mean the loss of most of a year's sales. The new Nintendo 64 bit game machine was not available in 1995, while the Sega Saturn and Sony Playstation are on the shelves. Who will sell more machines this year?

Time-to-market addresses many aspects of the marketplace. The best reason to be the first with a product is the additional income. This extra income is due to a higher price and more profit for a longer time compared to the later entrants. The leader can afford to reduce prices as competitors enter the market, since the development costs are covered by the time the late entrants appear. Developing a product that people want to buy is the key idea. Figure 1 shows the effect on total revenues due to early and late market entry. Additional benefits include the ability to exclude or preempt the competition, define the market, and control market share for yourself and the rest of the industry segment.

The consequences of not being first in the market are severe for those companies in the bottom half of the market. One application of Pareto's 80-20 rule says the top 20 percent of the companies will have 80 percent of the market. This is the classical market distribution for an industry: the first company has greater than 40 percent share of the market; the second, about 25 percent; the third, less than 15 percent; and the fourth, less than 10 percent of the market. As a result, the later market entrants have higher component costs, due to smaller volumes, and higher unit prices for competitive products. The lower prices and higher costs result in lower profits for the product line. Late entrants will also have to divert energy catching up with the leader(s). In addition, lower-tier companies face a loss of stature in the industry.

In emerging markets, it is difficult for the leader to correctly define the complete product. The first product doesn't always translate to market success; the best technical performance doesn't ensure market acceptance either. The Apple Newton was first released to great fanfare on July 30, 1993. Apple presented the Newton as a general purpose portable digital appliance with handwriting recognition capabilities. It didn't meet those expectations and may have been too far ahead of the market. The original product didn't have many useful applications and was unable to perform its unique feature, handwriting recognition, with any consistency. Now, however, it is becoming widely used in specialty applications such as electronic forms in which the underlying software only needs a limited range of responses.

These data suggest good planning and product definition is important for the time-to-market requirements. The product must have the correct mix of product features, performance, and price to be successful. At the same time, the ability to expedite both processes and materials, and most importantly, to continually accelerate the entire process through the development cycle is critical. The expertise to track materials through a process and to adjust queue times affects the physical movements of the project. The materials tracking skills require documented processes and complete data.

It is just as important to monitor and adjust the intellectual aspects of the projects. In spite of engineers' protestations, someone must manage the design cycle. The result of not measuring performance details means that important items in the design flow are unknown. Incomplete or inaccurate data means any changes to the work flow will be chaotic; the results are not predictable. The categories for measurements include time, cost, and accuracy or quality. Any methodology changes need to improve the measured results and reduce the total time for development.

Shorter product life-cycles translate into shorter design cycles. The desire for new products with more features and performance requires more detailed design and analysis. The requirements necessary for sub-micron designs exacerbate the conflicts between analysis and time. The Herculean engineering requirements preclude taking short-cuts in the design process, but the time-to market requires less total time.

The graph shows the loss in income as a result of being late in a market.
Courtesy of time to market associates

The cost of time-to-market One solution to this dilemma is to move the first pass on the silicon closer to the beginning of the design cycle. The advantages of quick first silicon include an earlier start on the design verification and target hardware for the software and test development teams. Indeed, a partially working part offers more real cycles to analyze than the simulations (unless the first silicon has catastrophic failures). Even with major IC failures, some services are available to "fix" ICs by making cuts and "jumpers" in the metal traces.

In addition, the debugging team can add "patches" to the PC board and other system hardware and software. The availability of the silicon improves verification time and quality, because it highlights areas of weakness in the design. The early silicon also enables faster time to final product by permitting the engineer to find more errors and to fix problems more quickly. The expedited silicon leads to better products due to the increased time in the test, software, and verification phases of the project. If done correctly, all of this leads to improved market position and long term company growth.

Additional costs will be incurred if the silicon needs revisions. Some ASIC vendors can compress the first pass cycle time for the parts by up to two weeks. This extra service may add some charges to the NRE to pay for expediting the masks and wafers, but it is well worth it. In addition, the company loses potential sales for a version of a product that can be out on the market quickly, even though it may not meet the original target specifications. Chip Express (Santa Clara, CA), in cooperation with time to market associates (Verdi, NV) and Xilinx (San Jose, CA) among others, have spreadsheet models to analyze the costs of an early turn on silicon. The models compare the income from sales for various scenarios of time-to-market. The models show that the results of missing the leading edge of the window are much more expensive than a silicon turn.

Analysis of costs and results A fast turn (on wafers) will take from one day to two weeks. When this is compared to the normal turn times measured in weeks, the time savings become obvious. The savings for a quick turn around in silicon are found in labor-cost and schedule reductions. The reduced verification and debug time for the hardware, compared to the possible number of simulations in the same time, facilitates faster system integration. A single engineer costs about $2,000 per week in salary and benefits, and over $4,000 when overhead and support costs are included. A two-week reduction in schedule for a team of ten engineers will save $80,000, enough to pay for an additional wafer run. The incremental sales from a partially disabled product could be in the millions of dollars.

An example of the costs for faster first silicon is Chip Express' 50 k gate Q1H580. The standard processing time is five days and costs $40,000; a one-day turn is $64,000 for two packaged units. The effective cost savings of a one-day turn versus a five-day turn will depend on the number of engineers working on the project. The break-even is 7.5 engineers for the cash outlays. Other companies can get a fast turn on the masks or reticules by paying a premium of up to 100 percent of the normal cost for a one-day turn (about $1,000 per layer). Only a few of the masks need to be expedited, since the wafer processing queue times do not allow more than a few processing steps per day. This results in reduced schedules for the first silicon without incurring excessive costs. If the vendor can split the wafer run and hold wafers at partial completion points in the flow, the risks of a fast turn are mitigated by the availability of partially completed wafers (for all cases except in those circuits requiring changes in the first layers or for an all layers change).

Since the end users have said that time-to-market is important to a company's future, they need to consider rushing the first silicon through the processing cycle as one way to improve the time-to-market. The costs of faster wafer processing are relatively low compared to the costs of the engineering time and to the lost revenue from missing the market window.

Tets Maniwa is a technical editor for Integrated System Design.

To voice an opinion on this or any Integrated System Design article, please e-mail your message to: michael@asic.com.

integrated system design   February 1996