Design Automation

Placement and Routing in Analog Design

Analog Devices finds ways to improve analog physical design.

by Paul Mason

"How can we increase productivity and quality in less time?" is the most commonly asked question in the world of IC design. Time-to-market pressures demand that we constantly look for new methods to shorten design cycles. Design methodologies such as gate arrays, standard cells, cell compilers, circuit synthesis, and autorouters help shorten design cycle times for digital circuit design, but few have helped analog design productivity.

Thanks to the recent emergence of new imaging, sensor, and communication products, we are seeing renewed demand for analog ICs with emphasis on wireless technologies. However, with this renewed demand for analog ICs, stringent price and time-to-market constraints have also emerged. Therefore, we must find new tools and new approaches to improve the design process and boost productivity.

Figure 1. This bias cell in the AD8073 is shared by all three amplifiers and has 25 components with 66 nodes.

One of the major bottlenecks in analog design is placement and routing. Despite automation of other processes, interconnect continues to be hand-crafted, due to the requirement for matching and balancing in the circuits.

About two years ago, our Analog Linear Products Group at Analog Devices International (ADI) in Wilmington, MA was beginning work on the AD 8073, a new product for a large-volume customer who needed production quickly.

We decided to use IC Craftsman (ICC) from Cooper & Chyan Technology Inc. (Cupertino, CA) to handle the placement and routing. At that time, IC Craftsman was not on the market, but we had beta tested ICC with good results, and our group thought it held promise for improving our design process. We integrated this place and route tool into our design environment, which combined Virtuoso, a tool suite from Cadence Design Systems Inc. (San Jose, CA), with a proprietary in-house tool called TC/ADICE/LSIM, a combination device generator, layout tool, and simulation environment.

The most challenging phase of the design focused on a particular cell--a bias network to set the operating points for the amplifiers. The cell had 25 components with 66 nodes (see Figure 1). Our goal was to produce as compact a cell as possible that could easily attach to the three amplifiers.

Design rules Before we began the place and route process, we specified restrictions and rules for the design. IC Craftsman was able to take these restrictions and route within the defined parameters. For example, maximum wire length can be restricted to control the total resistance in a line; wire width and length matching can be used to match pairs; and wire spacing can be adjusted to control capacitance and crosstalk between lines. IC Craftsman also let us give priority to certain nets or particular sections of a net, such as I/O lines or high-speed sections, that are more sensitive to the effects of capacitance.

The flexibility we have in defining rules makes the tool highly effective for our designs. In some designs, for example, it is necessary to use area-based rules or to change a rule in order to route a wire through a particular section. It might also be necessary to override placement rules for specific devices in order to space them further apart from other components. The rules for spacing and clearance for vias may differ according to device. For example, a resistor may require different via spacing than a transistor, which would also be different for a capacitor. Also, rules may differ according to wire length or wire width. For example, if two wires are running parallel for longer than 100 µm, we might have to space them differently than if they ran parallel for a shorter space.

IC Craftsman can also use pre-existing wiring, importing a cell from a cell library with its wiring and its rules. Many tools understand design rules for their own interconnect but not the rules associated with the devices and the rest of the imported data.

Routing through devices In this particular design and with our specified rules set, we were able to route the bias cell with only two pieces of second-layer interconnect (see Figure 1). This was done by routing through the bases of devices instead of changing metals to route over the devices. IC Craftsman gave us the ability to pass through devices, rather than going "to and around" those devices.

Although some routers route through, they typically route straight through, going in one side and out the opposite side. IC Craftsman allowed us to come in one side and go out the bottom, or go out the adjacent side instead of the opposite side. When the router comes into one side, it "knows" the other sides are equivalent. For example, where we had multiple emitters or bases, IC Craftsman recognized these as common points and could come out of the bottom of any of these contact points, instead of out of one and around all of the other contacts.

This capability also allowed us to connect devices by butting them together or overlapping them. We were able to make this kind of connection in the shared bias cell (see Figure 1). With IC Craftsman's Move and Align commands, we butted the devices together (see Q6 and Q7 in Figure 1), overlapping metal that was native to the cell, and the router understood that connection. The router later used these base connections as an interconnection path for routing through the devices to get to the base of Q7. Notice how Q5, Q11, Q13, and Q12 are similarly butted together and connected to the base of Q81 and to the emitter of Q4. Notice also how the metal interconnect comes in one side of the collector of Q81, out the other side of the collector and to the base of Q4.

Once the connection is made, if there are more connections to this point, IC Craftsman automatically completes the route; if no interconnect is needed, it leaves it alone. The overlap makes the series point connection, and the router knows it's already done.

Figure 2. IC Craftsman's constraint-driven layout allows problems such as crosstalk, clock skew, and key signal topology violations to be eliminated up front, avoiding costly, time-consuming physical verification, signal analysis, and layout editing iterations. The result is that designs are not only DRC- and LVS-correct on the first pass, but meet all performance requirements as well.

Wire necking Several functions in the tool allowed us to improve the cell layout. For example, the Set Width function allowed us to do wire necking and, as a result, we were able to place the supply buses on the top and bottom of the cell. The ability to specify wider lines on some nets is important to ensure the line has the necessary current carrying capacity. As the bus comes in from the outside world, it is very fat, but as we connect sections of the circuit to the supply lines, we don't need as much width and can taper the line width. This is commonly called wire necking, and IC Craftsman lets us do this automatically.

There are several mechanisms for setting wire width in IC Craftsman. The design rule check (DRC) rules set is the default, unless overridden. One way to change widths is to specify the width when setting up the netlist. Another is in the net-dependent option. Finally, any net can be set to any width on a net-by-net basis.

Handling pre-routes The way IC Craftsman handles pre-routing is another plus. The tool allowed us to pre-route particularly sensitive areas, protect our hand-routing with the Wire Protect feature, and then let the router finish the route. For example, after completing the route of the first cell, we set the height for the supplies, and the supply routes were then used to set the same pitch on the other cells. Those supply routes were imported into the tool and used as pre-routes.

Figure 3. Design flow for the AD8073, automating placement and layout with IC Craftsman.

Interactive routing IC Crafts-man's real-time, interactive routing (rather than batch routing) is part of the reason we were able to get such a dense, high-quality route. It is not a push-button tool; the user watches and adds his or her intelligence. We can see each iteration as it is occurring. If there is a problem, we can interactively make a connection to solve the problem, and then tell the router to continue. It is possible to weight wires according to the number of underpasses, wire length, and other factors. Plus the Wire Protect feature assures that the router will not rip up and re-route a line we have done by hand. The end-result is an "automated hand-route."

Using interactive placement commands such as Push, Move, Align, and Lock helped us set up the cell. The resistors were placed at the edge of the cell and locked in place. With the Push feature, we set a placement rule to keep DRC spacings correct. This provides area-to-area spacing that controls the gap between areas and can be used with the Push feature to get correct DRC spacings. Once a rule is set, if we pick up a component and start shoving or pushing it across the screen, the specified spacing is maintained between the component being moved and all other components it comes into contact with.

We found many of IC Craftman's functions valuable. For example, we created rows using the Align function. Rows are often used for placing devices on thermal lines so that the devices are located on an isotherm. Notice in Figure 1, we placed the resistors R5, R6, R7, and R9 on the bottom, creating one large device that sets the edge. Next, the transistors Q6, Q7, Q9, and Q10 were connected to the resistors and aligned into a row above the resistors. Then, Q81 and Q5 were aligned vertically with Q6. Finally, we placed the transistors Q11, Q13, and Q12 in a row and added the row of resistors R4, R10, R13, and R12. Throughout this process, there was a flyline displayed for the interconnect that helped us come up with optimum device placement. We achieved minimum-space DRC-correct compaction, but it was done with IC Craftsman's interactive toolset, rather than by hand. Our productivity is greatly enhanced by using IC Craftsman. We do not manually place devices and count grids. As a result, we are able to achieve device placement in a much shorter period of time.

DRC correct We also save time at the end of the design cycle. IC Craftsman maintains DRC rules during placement, and interactive and automatic routing. As a result, it provides DRC-correct layout, which saves time that would normally be required for running a verification program multiple times and correcting errors. In our experience, we are able to reduce design cycle time by about one-third by simply being able to assure DRC and LVS correctness.

IC Craftsman provides a placement mode for DRCs and a routing mode for LVSs. These modes report DRC violations and conflicts and LVS (layout versus schematic) unconnects, respectively. We get an on-the-fly report of errors and they are shown on-screen (a square for a DRC violation and a diamond for an LVS error). If we come out of the tool with no reported conflicts, we know our design is clean.

Product description
The AD 8073 is a high-speed linear amplifier--a triple video amplifier featuring 200 transistors. It is produced with a 1.5-µm technology in a bipolar process. For this particular product, die size is critical because of its effect on cost; therefore, the layout must be densely packed.

We can also get a textual report on errors and decide whether to make the fixes in the IC Craftsman environment or in the host layout editor. We can't modify cells in ICC; we can only
modify the interconnect. If the errors have to do with the device cell or P-cell itself, we can leave the router and go back to the host environment to fix the error.

Any of the design parameters (DRCs, routing widths, metal priorities) can be changed on the fly; all are available through pull-down menus. Or, we can set rules by areas within the design in the master toolset. We can also specify a different set of DRCs per section or region. This is true for pre-routing as well as auto-routing.

Easy integration Integrating IC Craftsman into our design environment was an easy task. The code is user-friendly, and it was easy to adjust and change. We can go directly from Virtuoso into IC Craftsman, then back into Virtuoso or our internal TC/ADICE/LSIM environment.

Results With IC Craftsman, we were able to turn around layout in a couple of weeks, instead of the usual six to eight weeks. Furthermore, the layout was as densely packed as our normal hand-routes, so we didn't sacrifice cost for improved productivity.

IC Craftsman is the first router we have used that can achieve results as good or better than hand-crafting. A shape-based router, IC Craftsman can handle the irregularly shaped components typical in analog designs. We have actually taken hand-packed routes, ripped the wires out, and supplied the resulting layout to the router, and it has matched or exceeded what was done by hand. ICC does what a person would do when looking at a route. As a result, it produces a shorter wire route and gives a less cluttered environment, allowing for a smaller, tighter cell.

On average, we have cut our design time by about two-thirds. This time savings not only helps us get product to market faster, it also gives us more time to improve a design. When we were hand-routing interconnect, the design process alone was so lengthy that we avoided redesign (backannotating layout parasitics and adjusting accordingly), unless it was absolutely necessary.

With IC Craftsman, we are able to do two or three revisions of a circuit in a day, which would normally have taken two to three weeks. What this means for the end-product is that we can spend more time improving the design and examining individual nodes. For example, we can take thermal considerations into account and do all the matching for transistor pairs. Ultimately, we are able to create better-optimized designs.

With the AD 8073, IC Craftsman helped us serve our customer quickly and cost-effectively.

Paul Mason is a senior layout design engineer with the Analog Linear Products Group of Analog Devices (Wilmington, MA).

To voice an opinion on this or any Integrated System Design article, please e-mail your message to michael@isdmag.com.

integrated system design  November 1996