Editorial

The Return of Hardware Prototypes Provides Peace of Mind Prototyping a complex chip on an emulator can cut design iterations and ensure first-time by Jonah McLeod

In the 1980s, designers created breadboard prototypes of integrated circuits before the chips were sent for fabrication. The pressures of time-to-market and the ever increasing complexity of ASIC chips (now over 1 million gates) pushed designers to replace prototyping with software simulation. Now, however, these very same forces are demanding the return of the hardware prototype.

A shortening time-to-market is mandating breadboards because integrated circuits contain increasing amounts of embedded software. One example is a single-chip laser printer controller. Time-to-market prohibits the sequential development of hardware and software. Instead, software engineers develop programs on a breadboard prototype of the chip as hardware designers build the IC, altering the prototype as the design changes.

Device complexity is also dictating the use of prototype hardware for debugging these large systems-on-a-chip. For example, Intel Corp. (Santa Clara, CA) was one of the first to employ large numbers of FPGAs to emulate the logic of its next-generation Pentium microprocessors. Such hardware prototypes enable designers to exercise far more operating conditions than possible with software simulation­a plus for these large designs.

Brian Levy, CAE productivity engineer at Hewlett-Packard, Vancouver Printer Division (Vancouver, BC), reported over 4 million clock cycles per second of real-time operation on a hardware prototype of a new HP printer controller. This is about 25 percent of its real-time speed. By contrast, simulation alone achieved only 2 to10 clock cycles per second.

The Hewlett-Packard project used the Explorer hardware emulator from Aptix Corp. (San Jose, CA) to emulate the ASIC portion of the chip and the HP64700 in-circuit emulator to replicate the microprocessor embedded in the design. Thus, software developers create code on the target hardware instead of creating it on a workstation. This eliminated the time-consuming task of porting software developed on a workstation to the ASIC component and the resulting hardware-software integration debug.

Another plus Levy cited was the ability of firmware development to change ASIC functionality. Previously, it was considered too risky to change an ASIC design near the end of a design cycle. With emulation, an ASIC can be changed with little risk. Furthermore, the ability to probe and observe internal nodes of the design on the hardware prototype simplified ASIC debugging.

Using a hardware prototype also has its drawbacks. First, the ASIC netlist description must be partitioned to fit into discrete size FPGAs. For example, in some projects, modules too large to fit a given FPGA are divided into smaller modules. However, splitting the larger module can produce an unacceptable number of I/Os. Levy cited one such troublesome module in his project. A second concern is at-speed emulation.

Nevertheless, the benefits from prototyping an ASIC before it goes to layout far exceed the drawbacks. Hardware prototyping's ability to overlap software and hardware development makes it a major agent for reducing time-to-market.

Jonah McLeod is editor-in-chief of Integrated System Design.

integrated system design  January 1996