FEEDBACK

Vendor makes suggestions for product evaluations.

The rule of thumb regarding whether you terminate or not may be too loose. Generally, the limit is much tighter: Td < 0.1 tr. Secondly, even if Ms. Vu's rule of thumb is correct, the Td to be considered is the loaded Td' seen in Figure 1...

The use of clamping diodes is not clear. Which reference at the end of the article contains the underlying theory? IBM has developed a termination they term "the perfect termination," which involves diodes but is considerably more complicated and takes into account the asymmetrical V _ih and V _il voltages in most TTL/CMOS TTL compatible bus drivers.

The statement that half the power in resistive terminations is consumed in the high state and half in the low state is incorrect. VME terminations, 220-(omega) pull-up and 330-(omega) pull-down, are an excellent counter example to this. The power dissipation depends on the Vcc (Vdd) and the threshold and whether matched or threshold level type terminations is desired. For example, Futurebus is a matched termination bus, while VME terminations are set by the ability of 24-mA drivers being able to meet the TTL receiver thresholds V _ih or V _il . Also, the quiescent voltage is not 1/2 Vcc but is determined by the resistors operating as a voltage divider, in this case being 2.94 V.

Lastly, choice of AC termination values must be approached carefully. If the capacitor is too large, recovering from a condition where the line is held high (or low) for many data cycles may exceed timing requirements on an interconnect...

Edward P. Sayre

North East Systems Associates Inc.

Mr. Sayre,

Pertaining to your first statement, the rule of thumb is not whether or not to terminate, but to prevent the pedestal effect on the rising edges of signals on heavily loaded lines.

If I have a tr=3 ns, based on your formula Td=0.3 ns, you need to terminate the transmission line if Td >= 0.3 ns. For FR4 material, Tpd typical=1.42 ns/in., this means the transmission line needs to be terminated if the net line length >= 0.21 in. This limit would require us to terminate almost every net on our computer boards.

On page 58 of the article, the following statements define the need for termination:

- No, when 2Td < tr

- Yes, when 2Td > or = tr

If the lines are sufficiently short, the signal still will be rising at the time tpd, and the reflection is part of the rising edge. With longer lines, the rise of the signal will be completed before a time tpd, and reflections will appear as overshoot and undershoot.

Pertaining to the second half of the first statement, I believe Td' includes the loading capacitance that is added on to the net. If there are only 1 or 2 loads, it is not that bad, compared to 10 loads on the net. There is no rule out there that will tell you exactly how to terminate the transmission line, because every net and every application is unique.

Clamping diodes will clamp the undershoot for V _ol and overshoot for V _oh . The termination was designed to cut off the ringing when the clamping diodes are active--otherwise, the diodes are inactive.

If my V _out ¾ -0.7 V, the clamping diode will turn on and clamp everything that passed -0.7 V. For CMOS applications, we have to make sure that every receiver receives V _il level with undershoot that does not pass the -0.8 V, otherwise the CMOS receiver will not work.

In response to the IBM statement, in my application, which is the computer industry, I am more concerned about output levels than input thresholds. Unless there is a lot of noise, once a signal passes the input thresholds, V _ih and V _il , the circuit will respond.

Also, my intention was not to target the dual termination resistors. The editors at Integrated System Design omitted the statement that clamping diodes with 2/3 rule are not recommended for any net with bi-directional signals (receiver/driver).

Pertaining to you comments on resistors and power, if I have a dual termination and assume that they are of equal value, then half of the current will be consumed in the high state and the other half will be consumed in the low state. Everyone who needs to have terminations for a bi-directional bus knows there are pairs of resistors available for this particular application: - 160//240, - 180//390, - 220//270, - 220//330, - 330//390, - 330//470, and so on.

The whole concept in using termination is to reduce the reflection on a net. There are different frequency ranges, parts, and timing constraints that each designer has to meet. Simulation should be used to try out a few different techniques to define which technique will fit into a particular application.

Pertaining to the AC termination comment, I agree with you 100 percent: AC termination values must be approached carefully.

Thank you for your input Mr. Sayre,

Mai Vu

Response to March's EDA Platform
I found Steve Schulz's column [in the March 1996 issue] on design for reliability very interesting. Its not often that you hear or see people in the design community talking about building reliability into products. Usually that is a subject of the "motherhood and apple pie" discussions among reliability engineers who talk about design for reliability but really practice testing reliability into products. I find that the rationale for this--the designers are busy and have a hard job as it is--is also accurate and that things typically remain as they are until a company gets burned with some product-level reliability issue...

Riko Radojcic

Response to Dan Ganousis' Viewpoint
I read with interest the viewpoint article "Why Windows NT for EDA" (May 1996 issue) and feel that Mr. Ganousis' analysis is incorrect.

He asserts that Windows NT offers higher performance than Unix. In fact, it is the hardware that offers the performance--the OS has very little to do with it.

At home, I run Linux (a free Unix clone) on an 80-MHz 486 with 8 Mbytes of DRAM, and it routinely outperforms Windows 95 and Windows NT, which I use at work on 16-Mbyte 75-MHz Pentiums. Linux and the latest PC's are a potent combination. Unfortunately, however, Unix EDA vendors are reluctant to port their products to Linux...because of the rapid and chaotic pace of change in the Linux world, the unknown number of Linux installations, and the perceived risk of supporting a free OS.

Unix has many technical advantages over Windows NT, including a simple and clean process model, a networked graphics system (X-Windows), excellent networking and remote administration facilities, and a consistent and simple file protection and ownership policy.

Mr. Ganousis' assertion that the "best performing EDA tools run on Windows NT" is debatable at best. Synopsys .com/isdweb/&lf=isd-sendtolog"> Synopsys , Cadence, Mentor Graphics , Compass, and Rubicad all offer leading EDA applications on Unix. I question whether their performance is worse than their NT cousins.

However, I do agree with Mr. Ganousis' prognosis that Windows NT will gain ground in the EDA field. However, the reason for this is Microsoft's massive marketing power, plus the convenience of running EDA and popular non-EDA tools on a single platform. Also, Unix-tool vendors have limited themselves because of their tools' astronomical prices. Thus, the emergence of NT as an EDA platform has everything to do with marketing and nothing to do with performance.

David F. Skoll

Response to June's Focus Report
It might have escaped your attention, so I thought I'd just point out that in your "Focus Report: Windows EDA Tools" (April 1996 issue), Viewlogic didn't list a single price! Not one! They all said "call."

I would offer my personal opinion that part of what makes such a report interesting to your readers is the pricing. If every vendor listed their price as "call" (what is this lobster? do we have a daily price?) would your report draw as much interest? If you share my concern that your readership was not well served, then you might also consider how the vendors other than Viewlogic will look upon this--they will be less willing to have pricing published if they can get a listing without it. This will make future Focus Reports of less reader service. Viewlogic really should have been listed as a company rumored to have NT tools. If they really had them, one would have thought Viewlogic would have known what the prices were! Since Viewlogic was not fully responsive to your Focus Report, you can only refer customers to Viewlogic to confirm the rumors! At least, that's this writers opinion--which is strictly my own.

Doug Freese

PS: I can understand a company with a new product not being prepared to announce pricing. My beef is that Viewlogic listed none of their pricing.

E-mail your letters to michael@asic.com or mail them to Michael Santarini, 5150 El Camino Real, Suite D-31, Los Altos, CA 94022. The opinions expressed are not necessarily those of Integrated System Design . We reserve the right to edit letters for publication.

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integrated system design  August 1996