ASIC Technology

Creating a Cost-Effective Alternate Supply for Single-Sourced ICs

Component supply interruption? Here's a way to minimize costly board redesign and time-consuming system requalification.

by George Chamberlain, Larry Lam, and Les Thurlow

It's becoming an all too familiar scenario: The supplier of a single-sourced IC in your well-established, customer-qualified system notifies you that the device is being discontinued. Your immediate reaction is, how am I going to replace this IC?

In such a situation, procurement managers and engineering departments typically face several choices:

• Redesign the board or subsystem containing the IC.
  
• Have the supplier retarget the device to a newer manufacturing process.
  
• Find a legacy product manufacturer to purchase the rights to the IC.
  
• Contract a design house to design a replacement.
  
• Arrange a "lifetime buy."

Unfortunately, these choices can have significant drawbacks. The one thing they often don't provide--and the thing customers in this situation need most--is the cost-effective supply of a functionally and electrically identical replacement IC. In too many instances, the standard redesign solutions cannot provide an exact pin-compatible IC, because the design database is often incomplete or unavailable.

A realistic solution For many system designers and suppliers, a reverse-engineered, pin-to-pin equivalent is the only realistic solution to replacing the supply of a single-sourced IC. (Reverse engineering is appropriate for other types of supply problems as well, such as quality and reliability issues.)

Semiconductor Insights provides a reverse engineering design service that demands only minimal involvement on the customer's part, and system performance verification is kept to a minimum because no firmware or major hardware changes are made. Perhaps most important, the customer is spared the time and expense of system requalification if no changes are made to functionality. This is especially valuable for those who design and supply systems for markets with strict regulatory, specification, and qualification demands, such as the telecommunications, military, medical, and industrial segments.

We apply proprietary reverse engineering techniques to re-create the chip's design database. We work from the original IC, so we know we're creating a database that is 100 percent accurate. From there, we can retarget the device to a new process technology.

We're also able to identify and address IP rights. Because many system companies are unaware of IP issues and don't have the resources or experience to research them, we can educate them and help them avoid expensive legal challenges or unexpected licensing requirements.

A case history will give you a better idea of what's involved in the reverse engineering effort. In one instance, a large industrial vendor came to us after learning that an important IC in its system was to be phased out. The system had an established customer base and strong anticipated sales. As is typical with the phase-out of electronic components, the customer was given a year's notice to deal with the problem.

Weighing the options When companies face the discontinuance of a single-sourced IC, one option is to redesign their boards or subsystems. However, the boards or subsystems are usually expensive pieces of equipment containing extensive software, making redesign costly--especially if customer requalification trials are required. Furthermore, companies may be unable or unwilling to divert or create the requisite engineering resources. In this case, the customer was a board manufacturer and didn't consider redesigning the IC an option.

The customer tried to persuade the original IC vendor to retarget the device to a newer technology and continue its supply. However, a part is usually discontinued because demand is declining and the part has become a low priority. Not surprisingly, the vendor was unwilling to retarget the device.

Finding a legacy product manufacturer willing to purchase the rights and supply the IC was another option. But, as is often the case, the customer couldn't find a legacy supplier willing to take on the device for just one buyer.

Finally, the customer considered contracting the IC design out to a design house. Concerns then arose about being able to re-create the device accurately because the complete design database was unavailable and the IC data sheet didn't describe its characteristics in enough detail. Ordinarily, the redesigned chip must be a pin-to-pin equivalent, or else the customer faces requalifying its entire system. (The exceptions are applications that must comply with strict military standards, in which case an IC change may trigger a full system requalification.)

Consequently, the customer considered negotiating a "lifetime buy" from the vendor to shore up enough supply to maintain product sales. This option was deemed risky, as forecasting demand is not an exact science, especially in today's fast-changing markets. Lifetime buys also assume that the system design will remain static, which is seldom the case. Even if the product is expected to enjoy years of sales, stockpiling incurs expenses for inventory storage space, as well as the cost of the devices. For those reasons, the customer decided to "overstock" as an interim solution, until a more permanent one could be found.

Working together We established and maintained a close working relationship with the customer throughout the project. For every milestone, we held meetings and design reviews either at SI or at the customer's site. In addition, we maintained weekly contact by phone, fax, and e-mail as needed. Thus we kept the customer informed and involved each step of the way, helping us to achieve the most efficient redesign and keeping the customer satisfied.

At the beginning of the project, the customer supplied us with the information it had on the IC: an actual device, a detailed data sheet, and application information. Our first step was to open the device; assess its scope, size, and complexity; and prepare a formal quotation.

A choice of redesign approaches

Semiconductor Insights offers four basic redesign approaches, enabling us to choose the one that best fits our customers' needs (see the figure): Reverse engineering We usually use reverse engineering when either little public information is available, apart from the device operation (data sheet), or the device is complex. Pin-to-pin compatibility is determined through reverse engineering and comprehensive modeling of the redesign against the original IC. Testing includes functional, timing, and drive simulations, as well as back-annotated simulation and verification against the original device. When a device is reverse-engineered, intellectual property (IP) issues such as technical patents and copyrights on software and firmware elements may also arise. With our expertise in IP support, we can provide the added value of researching and designing around potential IP infringements, thus minimizing the customer's future exposure. Clean-room approach We commonly choose a clean-room approach when substantial public-domain information on the device's operation is available, as is often the case with standard products. We also use this approach when design changes are required to address quality issues. Pin-to-pin compatibility is achieved by comparing the new design's pin behavior against that of the original IC. Combined reverse engineering and top-down design A combination of reverse engineering and top-down design is most appropriate when the circuit's functionality is complex and public-domain information is available. Reverse engineering is used to verify internal algorithms and ensure pin-to-pin compatibility. Reverse engineering is required only for internal algorithms not covered in the public-domain information. The performance of the original IC is used as the benchmark for pin-to-pin compatibility. Retargeting For retargeting, the customer provides a netlist (in any format), the layout, or a schematic. The design is ported to a new cell library targeted to a specific foundry, and pin-to-pin compatibility is verified against the original design using the hardware modeler. Redesign may also involve performance, testability, and functionality enhancements. In addition, we can save customers time by handling project coordination and by being the liaison with a silicon vendor--right through to the verified silicon prototype or, in special cases, to product supply. Design flows for the four redesign approaches

The quote included estimates from an IC foundry that we located because the customer did not have a relationship with any foundries. Locating a foundry is often a key part of the solution, because many of our customers' core businesses are building systems and they have little experience or knowledge in the foundry area. Based on our established contacts and experience, we located a foundry that best suited the customer's requirements at minimum cost. The choice was simplified by the fact that no military qualifications or extended temperature tests were required.

The quote also included projections for enhancing the device's testability (minimum 95 percent test coverage). The original IC was designed in the mid-1980s, when testability was not as vital as it is today. Therefore the device had few features for minimizing test time and maximizing test coverage.

We also gave the customer the option of expanding or reducing the chip's functionality. A reduction in functionality may be desirable if the device, which in this case began as an off-the-shelf standard product, is being redesigned as an ASIC. Per-unit costs can be reduced significantly if all of an IC's capabilities are not needed and can be designed out. However, eliminating circuitry can change the device's function and runs the risk of necessitating a full system requalification.

There were many modes on the device that the customer didn't need, but the customer decided against a reduction in functionality, opting for a fully pin-compatible replacement.

The design methodology was another integral component of the quote. In this case, the device was complex (about 40,000 gates), with dozens of distinct operating modes. Although we had a detailed data sheet and application information, we deemed it too risky to redesign the device using a top-down approach because perfect compatibility was the goal. We decided that reverse engineering would be the most efficient approach.

Reverse engineering and IP search Reverse engineering involves not only extracting circuit information from the device, but also understanding the circuitry and organizing it logically. Because this is traditionally a largely manual and therefore time-consuming task, we recently developed a computer-aided reverse-engineering tool to speed the process.

Typically, licensing agreements don't exist, and we can do a patent search during the extraction and analysis of a chip's circuitry. Wherever possible, we use design techniques that enable us to circumvent protected elements. In particular, we look for architectural patents, as such higher-level patents are more difficult to design around and may require rethinking the project. Additionally, if the customer has not done so, we recommend contacting the IC's original supplier to determine if a licensing agreement can be worked out.

In this case, we also conducted associated patent searches. Fortunately, there were no patent issues, and the customer had established licensing agreements, which allowed us to reuse many of the circuits present in the original IC. However, there were copyrights associated with the on-board ROM and control logic implemented in a programmable logic array, so those elements had to be eliminated.

Behavior modeling In parallel with the reverse engineering, we used a hardware modeler to extract the device's behavior and develop a functional test program. The modeler (ModelSource 3400 from Synopsys ) interfaces directly with our simulation software (Cadence Design Systems' Verilog-XL). This setup allowed us not only to create the test program, but also, during subsequent development, to conduct detailed comparisons of performance between our design and the original IC operating at full speed.

Moreover, the hardware modeler enabled us to fully characterize the original device's functional behavior. Even if out-of-spec stimuli are applied to the redesigned IC, we must guarantee that it performs to the same specifications as the original. In that way, we ensure true compatibility, even if the customer's application exercises the IC out of specification.

Retargeting Once the reverse engineering was completed, the database was ported to the target vendor's cell library. As part of this task, we redesigned circuitry to take advantage of the ASIC vendor's macro libraries while preserving the original architecture, and we independently verified each circuit block as a cross-check against our reverse-engineering work. Typically our reverse-engineering error rate is less than 2 percent. Although that level of accuracy is sufficient for understanding the circuit's broad functionality, it is not adequate for the stringent requirements of an IC that must function accurately in the first silicon revision.

Our block-level simulations take place simultaneously with the implementation of required design modifications. In our situation, the customer required 95 percent test coverage, which necessitated large changes at the lowest circuitry levels because the device incorporated old design styles that relied heavily on transparent latches, shared buses, and single-transistor pass gates. Also, the device included large counters that had no facility for being tested efficiently. The customer was fortunate, however: Even though the necessary changes required for expanded test coverage were extensive, it was possible to make them work from the reverse-engineered database. In most cases, however, the necessary design changes are too severe, and it is more efficient to perform a redesign from scratch. With this task concluded, we had a complete netlist and were ready to go to prototyping.

Working with the ASIC vendor A redesign's success doesn't end with delivering a netlist to the foundry. In most cases, we spend about one week at the foundry to ensure that the verification and sign-off process goes smoothly. In this case, because of the IC's complexity, a potential timing problem had been missed in the design flow and was identified during the back-annotated simulation.

After the prototypes were manufactured, the ASIC foundry passed the IC through the test program, and both we and the customer evaluated the device. At SI, we reran the hardware modeler to verify the device and compare its performance against the original. During this stage, we varied the timing and operating-frequency parameters to ensure pin-to-pin compatibility. At the same time, the customer tested the operation of the IC in its system. Thanks to the exhaustive simulation process and close liaison with the ASIC foundry, we encountered no problems during the final testing, and the new IC advanced to characterization and then production. At that point, our customer assumed an ongoing supply relationship with the foundry.

George Chamberlain is manager of the hardware development group of Semiconductor Insights Inc. (Kanata, Ontario).

Larry Lam is director of research and development at Semiconductor Insights.

Les Thurlow is a sales and marketing consultant with Technology Marketing Services
(La Jolla, Calif.).

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integrated system design  August 1997