Editorial

It's Time for the Return of the Silicon Compiler The more things change, the more they stay the same. by Jonah McLeod

In the late 1970s, Carver Mead and Lynn Conway wrote their landmark book Introduction to VLSI Design. They reasoned rightly that there weren't enough IC designers to create all the chips the world would need back then.

One of the tools that came about shortly after Mead-Conway's book was the silicon compiler. The tool, initially offered commercially by three start-ups--Silicon Compliers Inc., Silicon Design Labs, and Seattle Silicon Technology--accepted a behavioral description from the designer and produced an optimized silicon layout.

An early success of the tool was the MicroVAX-1 from Digital Equipment. A lower-performance version of the MicroVAX-2, the MicroVAX-1 had plenty to commend itself. The project was begun a year or so after the MicroVAX-2, yet it hit the market a full year ahead of its more successful sibling.

Back then, silicon compilers created layouts using then-current process technology. Today's design tools are one to two generations behind the process technology. As chip makers move toward 0.18-µm processes, design tools are struggling to produce circuits optimized for 0.5- and 0.35-µm processes.

I've always wondered why the silicon compiler failed to achieve wide market acceptance. I see two possible causes. One was that the tool required the designer to adopt a major new design paradigm at a time when most engineers were just beginning to understand circuit simulation. The other lay in the problematic relationship between the tool and the semiconductor vendor. For the tool to achieve optimum layout for a given IC process, it required very accurate process technology parameters from the semiconductor vendor. The more accurate the information, the better the final layout.

Parting with this proprietary information was a major decision. But more troublesome to the semiconductor vendors was that, with the silicon compiler, the user could do real comparison shopping. The user could compile the circuit for several different manufacturers' rules and then choose the fastest, smallest, and lowest-cost implementation. Silicon would become a commodity.

With the number of world-class fabs coming on line in Taiwan, Singapore, Thailand, South Korea, and soon China, I wonder if the world is ready for the return of the silicon compiler. With fabless semiconductor companies­long the major customer for Far East foundries­no longer consuming all the capacity, fabs welcome designs from any source, regardless of the tool that created it.

What form would such a tool take? It might be a behavioral synthesis tool, tightly integrated with a back-end place-and-route tool that synthesizes all the way down to layout. If that makes sense, let me know at jonah@isdmag.com what you think of the idea.

By the way, the publisher liked my deep-submicron article in this issue so much ("Designers Talk about Deep-Submicron Design," p. 77) that he plans to post a panel on our Web site, www.isdmag.com, on Aug. 15 to discuss the topic for an hour. On Sept. 24 at 11:00 AM Pacific Standard Time, we plan to bring some panelists together for an hour-long live chat. If you have time, check it out. *

Jonah McLeod is editor-in-chief of Integrated System Design.

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integrated system design  September 1997