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Programmable Notes
Most important advances in the greater chip kingdom unfold along a well-trodden path. This involves super-ambitious introduction announcements trumpeted with maximum fanfare, then a quiet period of months/years while the hard marketing spadework takes place. All the while, observers assume the initial big promises have already been enacted. Then, when the new devices finally start catching on, they are dismissed as old-hat laggards. This classic cycle describes what has occurred with 3.3-V programmables, which first surfaced as serious new products nearly four years ago. At that time, the boom in hand-held and portable equipment was in its infancy, making it apparent that the prevailing 5-V power supply standard had to be reduced to help extend battery life. Market researcher Dataquest (San Jose, CA) picked up on this in a mid-1992 report, but noted that only one 3.3-V device was then available. (The 3.3-V 7032 from Altera Corp. of San Jose, CA, it is thought, but memories are hazy on this subject.) PLD suppliers subsequently rose to the challenge in 1993-94 with numerous 3.3-V versions of their 5-V parts, then waited for the orders to roll in. The response, alas, amounted to little more than a trickle, say PLD marketing officials. It is these same officials who estimate that 3.3-V devices presently account for only about 5 percent of industry sales. But this relatively lackluster showing should not have been much of a surprise, they now say, for several reasons. First, consumer products such as portables never really were a primary PLD target. Thus, any 3.3-V devices were bound to be minor-league. More importantly, the low-voltage devices themselves, while hitting the mark for helping reduce system power requirements by more than 40 percent from the 5-V standard, fell short in matching 5-V performance. The problem was one of both design and process, sources say. These initial low-power PLDs largely were 5-V parts simply recharacterized or de-rated to operate at 3.3 V, which significantly decreases device speed. At the 0.6- to 0.8-µm process geometries used at the time, the 3.3-V versions ran 30 to 40 percent slower, mainly because the transistor drive capability also comes down proportionate to the voltage. This shortfall effectively limited designers of communication and datapath equipment, where speed is imperative, from opting for 3.3-V parts. Thus, any programmable logic used to support low-power microprocessors, memory and other low-voltage parts usually had to be of the faster 5-V family. Many circuit board designs consequently ended up as an erratic patchwork of both levels of voltage. "There actually was no compelling advantage to switch to 3.3 V. The need was just not there," says Norm Taffe, product marketing manager for programmables at Cypress Semiconductor Corp. (San Jose, CA). Cypress claims its entire FPGA family is the first to offer both voltages. Thus, it has a solid basis for comparison, although FPGA sales leader Xilinx Inc. (San Jose, CA) certainly has the most 3.3-V devices available. In the past year, sales of Cypress' 3.3-V devices have not climbed above 5 percent of its total, but recently have taken off to become about 15 percent of design-ins. Officials at Lucent Technologies' Microelectronics Group (Allentown, PA) and Lattice Semiconductor Corp. (Hillsboro, OR)--two firms pushing hard with new lines of 3.3-V devices--also report a strong upsurge in design activity. "No question, low power is going to be hot in 1997," says Stan Kopec, director of product marketing at Lattice. As the marketers see it, users are opting for lower-power programmables as a practical necessity because soaring densities generate high heat levels. "What's happening is designers do their power calculations (with 5 V) and have to vent the heat somewhere," says Barry Britton, strategic marketing and product planning manager at Lucent. "That's when they turn to low-power logic." Coincidentally, Lucent and the other suppliers are now producing improved parts that match up competitively, speed-wise, with 5-V devices. The key to breaking through the speed limitation is a fallout from ongoing improvements in leading-edge fabrication process technology that is driving down device geometries. The smaller dimensions that permit packing more transistors onto each chip reduce channel lengths and logic paths, supporting shorter delays and faster operation. As the process geometries used in advanced programmables drop below 0.5 µm, today's leading-edge standard process, the speeds of 3.3-V parts improve due to basic physics. At 0.35-µm process levels, for instance, the 3.3-V's delays are actually shorter than 5-V's specs, as Lucent points out in its marketing pitch on the new OR2TxxA series of 3.3-V FPGAs (Lucent, who benefited from that firm's semiconductor research and development, probably has longer experience fabbing 0.35-µm FPGAs than its rivals). With the 0.35-µm process, the delay (four-input combinatorial) time is 1.7 ns, compared to 2.1 ns for the 5-V version. At 0.5-µm, by contrast, the 5-V ATT2Cxx at 2.6 ns is faster than the 3-V ATT2T15 at 3.0 ns. These new devices' performance act as powerful inducements to speed-conscious designers, according to Britton. Other outfits such as Altera, Xilinx, and Actel Corp. (Sunnyvale, CA), which employ the 0.50-µm process to fab high-density 3.3-V parts, report similar improved specs and growing customer design interest. An example is Altera's FLEX 10KA family, whose 50 kgate device is now being delivered. Power supply voltage is cut 34 percent from a 5-V version and its current is cut 45 percent, combining for a power consumption saving of about 70 percent. Device speed measures up with Altera's 5-V family. Altera's thinking is that all the 0.35-µm devices from here on will be 3.3 V. With a very healthy supply and demand picture coming into focus for 3.3-V parts, is it reasonable to expect the low-power devices will soon push 5-V parts from the design scene? Not likely and for several reasons, say even low-voltage proponents. For one, the 5-V standard is hardy and well established, continuing to satisfy many users of non-portable equipment who don't have that compelling need to switch. Too, a host of key glue logic and peripheral components required to build a system are still not available in 3.3 V parts, ensuring that mixed voltage systems will be around for years. In fact, "right now, all 3.3-V systems are rare," points out Lucent's Britton. Customers want the option of using both 3.3-V and 5-V parts, and device suppliers all make sure that is possible. A Lucent design goal with the new 3.3-V ORCA line was "to make sure the I/O buffers could communicate with 5-V devices," says Britton. In effect, the parts have 3.3-V cores with 5-V tolerant I/O buffers. These buffers have selectable power supply pins to ensure proper biasing of the transistors in proximity to the buffers. Altera's FLEX 10KA parts are also designed to operate either 3.3-V or 5-V devices, with special circuitry at the I/O pins that can accept either voltage. Some earlier 3.3-V programmables require external level-shifting components, such as a pull-up resistor to boost inputs to 5 V or a series resistor to limit 5-V inputs to 3.3 V. This approach will fade as on-chip 3.3- to 5-V device options simplify design. To build on the momentum of 3.3-V devices, suppliers are turning out application material to help designers use them better. "We look at the power reduction potential from a system perspective rather than devices only," says Joel Rosenberg, marketing and application manager for FPGAs at Atmel. One example is a power conservation strategy for a 33-MHz data acquisition system with independent control and measurement operation. Using standard 5-V programmable parts for designing and implementing all the control and measurement modes (including interfaces, controllers, modulators, serial channels, timers, and counters) would need three high-density FPGAs with a 46k total gate count, consuming 500 mA of power. By contrast, the job can be done with a single 20-kgate, AT6010LV 3.3-V device employing a proprietary Cache Logic feature that reduces overlapping logic functions and gate requirements, according to Rosenberg. The payoff is system power consumption of only 100 mA (an 80 percent reduction) along with a substantially smaller use of board space. As for how much of the CPLD market the 3.3-V parts will eventually garner, the answer depends on which company is talking. All more or less agree that smooth sailing lies ahead for the next few years. But the visibility of the period thereafter gets murkier. Lattice's Kopec believes that "3.3-V devices will be one-third of the market by the end of the decade." But others, such as Actel's Robert Nalesnik, director of product marketing, are more cautious. Nalesnick thinks 20 percent penetration is the ceiling. "The 5-V device standard is so pervasive," says Nalesnick. Officials at Lucent, Altera, and Xilinx see another reason why 3.3-V devices will not become a standard that largely displaces 5-V devices. Process technology is advancing so rapidly toward ever-smaller geometries that 3.3-V power will not be in the leadership role long enough to thoroughly dominate equipment design as did the 5 V. They point out that 0.3- and 0.25-µm processes at many firms will be turning out first products within the next year, and 0.18-µm fabs are in sight by the decade's end. Xilinx's Sandeep Vig, vice president of marketing, is sure enough of his company's vision to offer an emphatic prediction. "I think 3.3 V will be the shortest-lived standard on record. By the end of the decade it will be 2.5 V," Vig says. Still, the company is executing what he calls "a very aggressive plan for the 3.3-V parts." Larry Waller is a contributing editor for Integrated System Design. To voice an opinion on this or any Integrated System Design article, please e-mail your message to: michael@asic.com. integrated system design February 1997[ Articles from Integrated System Design Magazine ] [ ICs and uPs ] [ Custom ICs and Programmable Logic ] [ Vendor Guide ] [ Design and Development Tools ] [ Home ] For advertising information e-mail amstjohn@mfi.com Comments on our editorial are welcome. Copyright © 1996 - Integrated System Design Magazine
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