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Density Increases Spur a User Rush Toward Efficiencies of ISP

New competitors aim jabs mostly at numero uno Lattice.

by Larry Waller


In-System Programming (ISP) is becoming an interesting topic, especially for the CPLD suppliers. ISP is hardly a new thing in the programmable world. For example, SRAM FPGAs are themselves inherently reprogrammable, and since 1992, Lattice Semiconductor Corp. (Hillsboro, OR) has made ISP the flagship feature of its CPLD line, successfully acquiring about 80 percent of the ISP business.

CPLD firms point to several reasons for the increase in ISP products. Even though these products have been around for a while, it can take years before users fully evaluate and become comfortable using them. Moreover, any new standard not introduced by a major semiconductor house takes longer to legitimize, some say.

Most Lattice competitors played down ISP's value until last year, when the marketplace began to show significant growth. The driver for ISP is the trend toward higher densities, which poses considerably more manufacturing challenges than simpler devices of the past. The problem is that higher pin-count device packages, 100 pins and up, cannot be easily removed for reprogramming without damage after they have been soldered to a board. Obviously, it is much more simple and faster to reprogram an installed chip than to replace it.

Stan Kopec, corporate marketing director at pioneer Lattice said, "We found customers wanted density in a smaller footprint, but leads are too delicate to put back into sockets." Curiously, the most highly touted ISP feature of several years ago, remote reprogramming of installed systems, has been slow to take off. Lattice and others say only the most sophisticated users, mostly in the telecom field, have tried it so far. Remote reprogramming is expected to become more common in the future.

Another factor that contributed to the slow takeoff of ISP is that manufacturing engineers and product developers have taken an equal place with designers in influencing CPLD buying. "This is a new target group that needs to be educated," explained Andy Robin, vice president of marketing for Vantis Corp. (Sunnyvale, CA), formerly a division of AMD Inc. (Sunnyvale, CA).

This strong move toward the in-system feature already shows up in overall market totals, said Rhondalee Rohleder, principal at Pace Technologies (Scottsdale, AZ). ISP market-share nearly doubled in 1996 to more than 20 percent of CPLD sales, amounting to more than $145 million. Interest in ISP performance starts at the 100-pin level, she confirmed, and increases sharply with higher density. "At greater than 240 pins, ISP will be ubiquitous," Rohleder said. Accordingly, Rohleder predicts nearly 61 percent compounded annual growth rate through the year 2000 for ISP.

With this potential growth, CPLD suppliers are positioning themselves with new products and big marketing campaigns. Making their ISP debut late last year, Xilinx Inc. (San Jose, CA) and Cypress Semiconductor Corp. (San Jose, CA) have strategies of differentiation in as many technical aspects as possible from market-pacing Lattice. For both firms, this meant using flash technology in the Xilinx XC9500 family and Cypress' FLASH370i line. Besides getting the benefits of the hot semiconductor process of the moment, the companies note other solid flash advantages, particularly, a smaller die size than EEPROM devices. They claim that continuing investments in the process will bring more immediate size, performance, and pricing improvements than other technologies. Foundry partners produce these products for Xilinx, while Cypress does its own production in-house.

In turn, these flash technology claims evoke a strong reaction from other ISP suppliers such as Lattice and Altera Corp. (San Jose, CA). Lattice's Kopec stated that unlike memory parts, flash programmable devices have yet to establish themselves. "It's an immature and unproven technology for logic," he said, indicating that a smaller die size makes no difference. This opinion is seconded by Altera's Bob Beachler, director of strategic marketing, who said, "we haven't seen that flash gives much of an advantage." Altera officials know this from experience, having purchased Intel Corp.'s (Santa Clara, CA) flash PLDs several years ago.

The two newest ISP suppliers, Xilinx and Cypress, are emphasizing the need for maintaining identical pin assignments even after new variables or input signals have been added. Logic is often moved within the device or bus connections are changed when the programming is updated. Xilinx has dubbed this feature, "pin-locking," while Cypress pushes its capability to implement changes with confidence that existing pinouts will be maintained. "If reprogramming causes pins to move around, then it's not really reprogramming," said Bryon Moyer, product marketing manager for PLDs at Cypress.

Lattice may be vulnerable on this product feature. Scott Lewis, director of CPLD marketing at Xilinx, said "Lattice's weakest point is that they don't guarantee pinout changes." To offer this pin-locking feature, Xilinx has beefed up its device architecture to improve signal routability, which is fundamental to reprogramming overall, along with other product features such as function block fan-in and bi-directional individual product and term allocation. For its part, Cypress' FLASH370i family also offers upgraded routability featuring a programmable interconnect matrix, which aids in fixed-timing performance. This allows logic changes without affecting system timing.

As the ISP leader, Lattice expects to be the target of marketing onslaughts from rivals. But Kopec takes exception to what his firm views as unsubstantiated claims on key features and pin compatibility criticisms hurled by Xilinx, in particular. "Xilinx is doing what it does best: pick an issue to sell on and blow smoke," he said. "Lattice has been addressing this fundamental programming need for years and has continuously improved it. Now, we are as good as anyone. Being under attack actually is confirmation that we have a good idea and there are lots of copycats out there." Lattice already markets 25 high-density products in its ISP line, up to 256 macrocells and with 500 macrocells in the offing. It continues to bring out devices it calls "groundbreaking," such as the ispGDX for general digital crosspoint, which debuted in April. It is intended for bus interconnect designs now served by standard logic products.

Besides the competition between products, there is a possibility that the ISP terminology itself will become an important factor. Lattice has applied for a trademark on the term ISP, in which it has made a major investment. Therefore, Lattice is serious about enforcing a trademark, if one is granted, according to Rohleder of Pace Technologies. Cypress evidently takes such a possibility seriously, carefully calling its products ISRs, which also is part of its differentiation strategy. Heavyweights Xilinx and Altera, however, regard and use ISP as a generic description and have no intention of making any changes.

Adding more contention to the marketing tussle, Altera has steadily added ISP products to its lines since introducing its first one in 1995, and it is pushing them to meet increasing user interest. With its MAX7000s and MAX9000 families, the San Jose firm has what Beachler terms "the broadest density range in ISP, covering the entire spectrum to 560 macros, which is the largest of its kind now available." Altera also recognizes the importance of pin-locking and has implemented more routing track resources to support it. Vantis, also, is an ISP player and expects significant growth with its Mach 5 CPLDs and other products to be added.

With these and other programmable firms pursuing one of the most promising PLD growth niches, the sales rankings could be interesting. Most insiders believe that Lattice's headstart and good customer relationships could give it the edge in retaining ISP leadership, but at much lower levels than today's 80 percent. Xilinx and Altera will certainly contend for the number one spot because of their market power and resources. Having a new plan to focus all its PLD ambitions on its flash ISP product, Cypress could also be successful. And Vantis' new independent status should help.

The ISP business has all the earmarks of a very demanding horse race, observes Cypress' Moyer. "And there are some pretty big horses in it," he adds.

Larry Waller is a contributing editor for Integrated System Design.

To voice an opinion on this or any Integrated System Design article, please e-mail your message to: michael@asic.com.

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integrated system design  June 1997



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