System Design

Concurrent Engineering Delivers at the Chip and System Level

Two design teams--at a system maker and a chip vendor--work together successfully while thousands of miles apart.

by John Lynch and Harold Schiefer

Today's companies must set their sights on market windows shortened by the rapid pace of technological development, forcing them to accelerate already shortened product development cycles. At the same time, product development is also stressed by the need to continuously absorb more and more functionality into fewer devices in order to reduce system costs while continuing to raise the level of performance. Success in doing the latter may depend on combining the core competencies of more than one company to produce the best solution--but only if it can be done in a timely fashion.

In Focus Systems, a maker of multimedia projection systems in Wilsonville, Ore., had a new product in development, the LitePro 730 LCD projector, for which it would design two 100,000-gate ASICs. Across the country and across the border in Markham, Ont., outside of Toronto, Genesis Microchip was starting development of a new video/graphics-processing chip, the gmZ1 Advance Image Magnification DSP. In Focus felt that the new chip offered the best quality video/graphics zoom processing, plus cost-effective integration features, and so wanted to design it into the projector's video pipeline (see Figure 1). However, In Focus's aggressive project schedule dictated that it start the design several months before the chip vendor was scheduled to deliver first silicon.

Figure 1. The position of the Genesis gmZ1 video/graphics-processing chip between two In Focus ASICs in the projector's video-processing pipeline made early access to a gmZ1 VHDL prototype essential for system verification.

Early access to new technology The two companies agreed that In Focus's in-house ASIC development had to be concurrent with Genesis's development of the gmZ1 (see Figure 2). Genesis would provide In Focus's design team with functional VHDL prototypes of the gmZ1 during key project milestones so that they could integrate the processor with their ASICs and other system components.

In Focus would benefit by having early access to new scaling technology and by not having to wait for prototype silicon to verify system integration. Genesis would benefit by securing a volume customer while still early in the design cycle, as well as by having an independent third party functionally verify the gmZ1 at key milestones during its development. The chip maker would also gain projection system experience from In Focus to ensure that the gmZ1 had an optimal feature set for driving various types of projection displays.

The problem was modeling the gmZ1 in In Focus's simulation environment (see Figure 3). The In Focus ASICs had to interface gluelessly with the gmZ1.

The task of transferring the gmZ1 VHDL models was simplified because both In Focus and Genesis would use the same VHDL simulator, Mentor Graphics' Quick HDL. Genesis constructed the VHDL model using actual RTL source code for the development of the gmZ1; the code was a "prototype" that had some key data-processing functional blocks replaced with alternative behavioral architectures to protect key intellectual property. The architectures were identical to the replaced blocks in terms of latency.

The VHDL prototype was functional only; no additional timing information was included. Timing issues were resolved independently by the two design teams using static timing analysis and an agreed-upon timing budget.

The gmZ1 VHDL prototype provided additional functionality for capturing all valid RGB data input transfers to a file. The additional functionality gave In Focus the ability to verify data transfers from the frame buffer control ASIC to the gmZ1 by using a perl script to compare the contents of the frame buffer file to the video input pattern file. The VHDL prototype also generated a fixed output RGB image test pattern that In Focus used to verify data transfers from the gmZ1 to the overlay control ASIC. Thus the VHDL prototype could be treated by the system integrators as a black box and the results of all bus transactions could be monitored. Genesis's designers compiled the VHDL RTL (with the -nodebug option) into a library, along with some gate models and I/O pad models from the ASIC process targeted for the gmZ1.

Genesis used the Quick HDL simulator running on Hewlett-Packard workstations, verifying the design with the standard gmZ1 testbench. Then the gmZ1 VHDL prototype library, a corresponding gmZ1 testbench, and PostScript files of simulation results were encrypted and transferred to In Focus's FTP site.

Recompiling the gmZ1 testbench by In Focus on Sun workstations using the VHDL prototype library was a breeze. The gmZ1 prototype operated as expected while running on the Sun machines, confirming successful transfer between companies and workstation platforms.

Figure 2. Genesis's design team delivered gmZ1 VHDL prototypes at key project milestones to support concurrent ASIC development at In Focus.

At five key milestones in the development of the gmZ1, such as the completion of the RTL validation and tape-out, Genesis provided In Focus with VHDL prototype updates. The projector maker adjusted its project schedule so that all key milestones lagged the same milestones at Genesis by about two weeks.

The first "analysis" model was a small VHDL block that was compiled and shipped in order to verify the file exchange capability and In Focus's ability to reconstruct a Genesis simulation environment. It's amazing how relatively minor issues such as ensuring that compiled versions are aligned and that encryption passwords are correctly exchanged between design teams can reduce design pressures if they're resolved before a concurrent development gets too far along.

The first signs of life When Genesis's design team had the gmZ1 design partially integrated and functioning, they generated an early model and transferred it to In Focus. The model was verified against a subset of the gmZ1 core RTL simulation suite that tested some of the functional modes In Focus needed for the initial projector system integration effort. Then late nights at the office started.

In Focus's design team began integrating their ASICs with the gmZ1 early model into the system simulation environment. Meanwhile, the Genesis design team continued to integrate the gmZ1, adding I/O pads and running the remaining functional sign-off suite of simulation tests specific to the projector manufacturer. Once the integration of the gmZ1 was complete and all the functionality required by In Focus had been simulated, the team delivered another model, the "working" model, to In Focus. In Focus's designers replaced the early model with the working model and continued their system validation. The transition from early to working versions was smooth because the In Focus team was already familiar with using the gmZ1.

Figure 3. In Focus's simulation environment incorporated the gmZ1 VHDL prototype and models of other system components for functional verification.

When Genesis's team completed all other functional validation of the gmZ1 RTL and was about to begin layout, it produced a prelayout model for In Focus's designers. This model reflected the state of the gmZ1 design at the start of placement and routing. The final update scheduled was the "postlayout model," which reflected the changes made during placement and routing.

As it turned out, though, no functional changes were made during placement and routing, so the gmZ1 designers simply notified their In Focus counterparts that the prelayout model was still an accurate representation of the postlayout design and no further models were transferred.

Validation Genesis validated the gmZ1 design by simulating it using behavioral testbenches. A functional subset of the Genesis gmZ1 testbench always resided at In Focus so that both design teams would have access to a common testbench that could be used for identifying and resolving any functional issues. The shared testbench proved effective during the first model deliveries and initial system integration.

In Focus developed a system simulation environment for the LitePro 730 projector architecture. It included the gmZ1 model, the two ASICs in design, Synopsys 's Smart-Models for the synchronous DRAM and microprocessor, and proprietary testbenches for the video input and LCD display.

The gmZ1 design team didn't have access to In Focus's proprietary testbench. Also, the In Focus design team didn't have visibility inside the gmZ1 VHDL prototype because of the way the library was compiled and the embedded alternative architectures. Therefore Genesis's designers needed some method of recreating simulations thousands of miles away whenever In Focus's designers encountered a problem they couldn't resolve because of their inability to view the gmZ1's internal signals.

The use of a second shared testbench soon proved to be too cumbersome. The teams decided to share simulation results by transferring value change dump (VCD) files using In Focus's FTP site. The In Focus engineers set up a VCD file to record the stimulus of the gmZ1 instance's module ports during a run of any simulation that they wanted the Genesis team to review. They uploaded the file to the the FTP site, and the Genesis team downloaded it and used the QuickHDL VCD read command to apply the stimulus to their actual gmZ1 model. Thus the Genesis team could recreate any situations encountered during In Focus's simulations and, with full visibility inside the actual gmZ1 VHDL, quickly respond with any necessary patches or parameter register programming information.

Throughout development, the two design teams maintained regular contact by telephone and e-mail. The communication worked well enough to keep travel to a minimum, with only two trips made between Wilsonville and Markham: one to identify model exchange deliverables and milestones for concurrent development and a later meeting for a system design review during the integration of the gmZ1 VHDL prototype into the system testbench.

Success First silicon for all three chips arrived within a few weeks of each other. After some initial verification testing of each chip, the three were integrated on a prototype board at In Focus. System integration and debugging continued at In Focus while Genesis completed the stand-alone verification of the gmZ1.

The concurrent validation effort was a success--the three chips worked together perfectly the first time. Both companies got what they were after from the concurrent design process. The LitePro 730 is selling well, and the gmZ1 is expected to become Genesis's most successful IC to date.

Though the two design teams have moved on to other projects, both products stand out as examples of what's achievable when companies allow design teams to cooperate and tackle a common set of goals. *

John Lynch is an engineering manager at In Focus Systems Inc. (Wilsonville, Ore.).

Harold Schiefer is the manager, IC architecture, at Genesis Microchip Inc. (Markham, Ont.).

To voice an opinion on this or any Integrated System Design article, please e-mail your message to miker@isdmag.com.

integrated system design  December 1997