Protocol controller Symbios Logic introduced an I ₂ O-ready, PCI-to-fibre channel protocol controller called the SYMFC920. The combination of the I ₂ O driver architecture and fibre channel technology provides an I/O solution for high-performance servers, workstations, RAID controllers, and RAID subsystems. The chip delivers full-speed fibre channel performance of 1 Gbyte per second and operates in full duplex mode for a total transfer rate capability of 2 Gbytes per second. It also supports the direct connection of up to 126 devices on a single fibre-channel arbitrated loop at distances up to 30 meters with copper and 10 kilometers with optical interface options. The SYMFC920 is already being used by OEM development partners, and it will ship in quantity in Q3 of 1997. The single unit price is $300. Symbios Logic Inc., Fort Collins, CO. Contact (800) 856-3093, literature@symbios.com, or www.symbios.com.

PCI library Systems Science announced the release of a self-checking, transaction-based PCI library. This library is used to verify PCI-based designs which are described in Verilog under a Vera verification system. The PCI library, which is written in the Vera Hardware Verification Language (HVL), contains bus transactors and models for PCI devices and for a central arbiter. System Science claims that verification PCI design using a Vera-PCI library is four to ten times faster than PCI verification using Verilog by itself. The Vera-PCI Verification Library starts at $2,000 for binary, floating-licenses, and $14,000 for source licenses. Systems Science Inc., Palo Alto, CA. Contact (415) 812-1800, info@systems.com, or www.systems.com.

Co-verification tool Simulation Technologies introduced Virtual-CPU, a co-verification product that allows designers to analyze and validate the interaction between hardware and software early in the development process. With V-CPU, the target processor is replaced by a virtual processor that is linked to a simulation environment with a bus-functional model (BFM) running in either host-code execution mode in a workstation process or in target-code execution mode within an instruction set simulator (ISS). V-CPU allows hardware and software engineers to design using familiar tools: hardware engineers use HDLs and logic verification tools, and software engineers use C or assembly language development tools. V-CPU offers a co-verification environment for embedded systems that use MIPS, PowerPC, Motorola 68K, X86, ARM, and i960 CPUs, as well as the PCI bus. Further, V-CPU supports co-verification of embedded systems built around other CPUs and buses. The debuggers normally used in software development (DBX, GDB, etc.) and hardware development (VirSim, Verilog, etc.) can be used to observe and control the executing software. Virtual-CPU is $40,000. Simulation Technologies Corp., St. Paul, MN. Contact (612) 631-1858, info@simtech.com, or www.simtech.com.

Design environment OrCAD announced shipment of OrCAD Express for Windows NT. Express is a design solution that integrates VHDL, schematic, and mixed-mode design entry, simulation, and synthesis into a single application for under $5,000. Express comes complete with a custom version of Esperan's VHDL tutorial on CD-ROM. With OrCAD Express, engineers can design board-level systems with field-programmable gate arrays (FPGAs) and complex programmable logic devices (CPLDs) from OrCAD Solution Partners Xilinx, Altera, Lattice Semiconductor, Actel, and Vantis. OrCAD Express for Windows NT is available immediately. OrCAD customers who own the OrCAD FPGA Designer Pak will receive OrCAD Express free of charge. Attractive upgrade options for other OrCAD customers are also available. OrCAD Corp., Beaverton, OR. Contact (800) 671-9505, intl@orcad.com, or www.orcad.com.

Test station Integrated Measurement Systems announced a new test station that extends the maximum pin count of the ATS test station series to 576 I/O pins. The new system is designated the XTS for eXtended Digital Test Station. The XTS is designed for testing complex devices such as deep submicron ASICs, microprocessors, and MCMs. It has either 100 or 200 MHz performance in either single timeset or multiple timeset versions and up to 64 analog channels. The tester can handle packaged devices of up to 760 pins, and can include scan with up to 32 Mbytes of pattern depth. Pricing starts under $2,500 per pin. Integrated Measurement Systems Inc., Beaverton, OR. Contact (503) 626-7117 or www.ims.com.

State-machine simulator Visual Software Solutions announced StateSIM, a high-level state-machine simulator. In combination with their StateCAD tool, StateSIM simplifies the programming, debug, optimization, and documentation of FPGAs from state diagrams and logic equations. The toolset features graphical simulation and state machine animation as well as many other design and debug functions. StateSIM is available for all x86 platforms running Windows. StateSIM is $895. Visual Software Solutions Inc., Coral Springs, FL. Contact (800) 208-1051, (954) 346-8890, rescoto@attmail.com, or www.stadecad.com.

integrated system design  May 1997