TOOLS AND TECHNOLOGIES

Products and services for system design

NT EDA with connection to the Internet OrCAD's Enterprise product line for electronics companies moving to Windows NT gives engineers instant electronic access to component information on the Internet and corporate intranets, all from within their design entry applications. OrCAD Enterprise Bridge is designed for larger engineering enterprises whose design team members need simultaneous access to a central source of component information. It provides secure client/server access to a centralized database of reusable component information from internal databases, plus reference component information gathered from the Internet. Consisting of OrCAD Enterprise Bridge Warehouse and OrCAD Enterprise Bridge Client, it runs stand-alone and also plugs into OrCAD Capture and Express, as well as Viewlogic ViewDraw. All new OrCAD Enterprise products are scheduled to ship worldwide in Q4. OrCAD Capture Enterprise Edition goes for $2,495; OrCAD Express Enterprise Edition is priced at $6,995. OrCAD Enterprise Bridge, available in configurations for five or more users, starts at $25,000. On-site training and implementation services are available through the OrCAD Enterprise Group. OrCAD Inc., Beaverton, Ore. Contact (800) 671-9505, (503) 671-9500, info@orcad.com, or www.orcad.com.

GUI for CoverMeter Advanced Technology Center's EDA Products Division announced the availability of a graphical user interface (GUI) for CoverMeter, a comprehensive, flexible Verilog code coverage product. With CoverMeter's new GUI, users can easily navigate across the entire breadth of its functionality. The interface is designed to help users "dissect" coverage reports rapidly, offering them many different ways to inspect those portions of their designs most critical to on-time project completion. CoverMeter users will be able to display multiple test coverage results in separate windows on the same screen, as well as view the incremental changes in coverage from one test to the next. A complete GUI for CoverMeter's NT implementation will be available in Q4. CoverMeter is priced at $15,000 per seat for Unix and $10,000 for Windows NT environments. Advanced Technology Center Inc., Laguna Hills, Calif. Contact (714) 583-9119, ext.222; (714) 583-9213; info@covermeter.com; or www.covermeter.com.

New ASIC and DSP cores Cast has added several synthesizable cores to its ASIC Cores Series and released a new family of synthesizable cores called the Functionality DSP Series. With the new additions, the ASIC Core Series includes about a dozen different processors, controllers, communications devices, and other functions. These are available in flexible VHDL source code form or in a more economical precompiled (netlist) form that is already optimized for Altera or Xilinx implementations. Pricing varies by core but is meant to help make IP-based design more affordable to mainstream designers. Altera netlist cores, for example, start at $2,000. The new Functionality DSP Series provides VHDL source code for 35 common digital signal processing functions, including various filters, math functions, a Viterbi decoder, elastic buffers, and I/O interfaces. These parameterized cores allow designers to experiment with and implement different DSP algorithms. The cores are available individually or in a discounted library package. Cast Inc., Pomona, N.Y. Contact (914) 354-4945, info@cast-inc.com, or www.cast-inc.com.

Interconnect analysis tool Ansoft has released the EZ2D Calculator, which aids in the electrical analysis of interconnects. The tool is a 2-D field solver for the quick analysis of multilayer cross sections of printed circuit boards, cables, and on-chip interconnects. Its key feature is the quick and easy setup of problem geometries from a library of predefined parameterized structures. Once a model is selected, the user enters geometrical feature sizes or material properties from the keyboard. The tool automatically sets up the boundary conditions and creates the mesh. With the push of a button, all the electrical line parameters, such as capacitance, inductance, resistance, conductance, characteristic impedance, signal velocity, and crosstalk coefficients, are calculated. The cross-section models used with EZ2D Calculator are fully compatible with Maxwell 2D Extractor, a fully featured 2-D field solver. The tool will run on all popular Unix platforms and on PCs running under Windows 95 or NT. Delivery is scheduled for the summer. Pricing is $2,900. Ansoft Corp. Pittsburgh, Pa. Contact (412) 261-3200, (412) 471-9427, or info@ansoft.com.

DAI Coverscan 2.0 A Verilog code coverage tool, DAI Coverscan 2.0 provides quantitative information about which portions of the Verilog HDL code have been exercised during simulation. In addition to statement and decision coverage, it adds expression coverage, which computes the coverage of variables within an expression. The tool consists of three main components: DAI Precoverscan, which prepares the design for coverage recording; the DAI Coverscan Recorder, which works in conjunction with the Verilog simulator to record coverage information during simulation; and the DAI Coverscan Analyzer, which provides postsimulation analysis of the coverage results. The new version performs three major types of analysis: statement coverage monitors the execution of each statement; decision coverage is used to determine whether branches of a case statement are executed or not; and expression coverage tracks which terms of an expression have been exercised. It is available for Sun (SunOS and Solaris) and HP (HP-UX) platforms, with quantity pricing at less than $20,000. Design Acceleration Inc., San Jose, Calif. Contact (408) 885-1885, info@designacc.com, or www.designacc.com.

ESL design entry on PCs Speed Electronic announced speedCHART Pro, a Windows 95 and NT version of its graphical system-level design environment. It allows designers to use legacy designs or capture their design specifications using several editors (schematic, spreadsheet, finite state machine, Verilog or VHDL, and flowchart), verify those specifications in a simulation or animation debugging environment, and translate them into popular simulation and synthesis formats. The environment works with synthesis tools and popular HDL simulators. System designers using PCs and moving to high-level design tools now have access to speedCHART for their FPGA and ASIC designs. Prices for speedCHART Pro start at $5,000. Speed Electronic Inc., Sunnyvale, Calif. Contact (408) 328-0950, info@speed.com, or www.speed.com.

FPGA synthesis Exemplar Logic's new FPGA synthesis environment, Galileo Extreme is based on a new heuristic technology called FAST (FPGA Architecture Synthesis Technology) Flows, which adds expert intelligence to high-level language optimization. In quick mode, FAST Flows enables Galileo users to achieve run times up to 300 times faster than Galileo version 3.25 and up to 5 times faster than competitive products. A new feature, Smart Partitioner, partitions large designs into smaller blocks for separate optimization, then links the blocks back together, all without disturbing the design. The environment also has a new intuitive GUI, based on Galileo Extreme Technology (GET), that gives users control over the synthesis operation by providing automatic technology-based defaults. Users can intervene to set options at run time, if necessary. The product begins shipping in July. Updates will be shipped to all Galileo customers with active maintenance. Prices start at $7,500 for single-FPGA-vendor node-locked versions and at $10,000 for multivendor node-locked versions, which include all FPGA manufacturers. Prices for server-based licenses with support for all FPGA vendors' products start at $18,500. Exemplar Logic Inc., Alameda, Calif. Contact (510) 337-3700, sales@exemplar.com, or www.exemplar.com.

Verilog simulator A mixed event- and cycle-based simulator for Verilog, Super FinSim supports the entire Verilog language, as well as a complete simulation environment based on PLI, SDF, and VCD. A smart partitioner analyzes the design and decides which areas can be simulated by the Enhanced Cycle Simulation (ECS) kernel. The rest is simulated by the event-driven kernel, which preserves accurate timing information, can handle modules with path delays, and accommodates simulation values of Xs and Zs. Super FinSim supports all popular display tools, including Design Acceleration's SignalScan, Veritools' Undertow, and IK Technology's Ishizue. As an option, it supports FinCov, a tightly integrated code coverage tool with low overhead (under 35 percent), making it a viable solution for regression code coverage. Super FinSim also supports coverification of C code and hardware by providing an efficient interface between the simulated C code and the hardware simulation. Prices run from $799 to $28,000, including maintenance for one year. Fintronic Inc., San Mateo, Calif. Contact (415) 349-0108, ext. 105; info@fintronic.com; or www.fintronic.com.

Deep-submicron place-and-route Cadence Design Systems announced its new Silicon Ensemble-DSM (deep submicron) place-and-route tool suite. Silicon Ensemble-DSM features a new routing technology called WarpRoute that is 3 to 20 times faster than existing commercial solutions, advances in its Q-Place algorithms that provide concurrent block and cell placement, and optimized compaction technology in its FlexChip area-based routing approach. The WarpRoute technology is architected from the ground up to handle the size and complexity of mulitillion-gate DSM designs at 0.35 ýp and below in a timing-driven flow. WarpRoute also features an automated "search and repair" system to correct routing violations. New functionality includes congestion minimization techniques, automated floorplan resizing, and graphical feedback. Silicon Ensemble-DSM is available immediately for Unix-based workstations from Sun Microsystems and Hewlett-Packard. It is priced starting at $316,000. Upgrades for Cell3 Ensemble and Silicon Ensemble customers start at $25,000 and $65,000, respectively. Cadence Design Systems Inc., San Jose, Calif. Contact (408) 943-1234 or www.cadence.com

integrated system design  August 1997