TOOLS AND TECHNOLOGIES

Products and services for system design

Physical design tool A new version of SonIC, SonIC-IV, has the capacity to place and route cell-based IC designs with up to 250,000 cells. It is made possible by the recent introduction of the superfast TeraCell placer from CLK Computer-Aided Design Inc., which makes placement feasible for designs of this size. SonIC-IV merges gridless, variable-sized die placement results with Silicon Valley Research's LineSearch area router. It includes SVR's Analog Tool Box, which brings analog timing simulation inside the place-and-route tool to solve problems when they can be solved. SonIC-IV is available now for HAL, Hewlett-Packard, and Sun Microsystems Unix platforms. It is priced from $400,000 to $450,000. Silicon Valley Research Inc., San Jose, Calif. Contact (408) 361-0333.

Verification system Release 3.0 of the Vera Verification System includes a source-level debugger for the Vera-HVL hardware verification language and links to Quickturn Design Systems' emulators. The release focuses on ease-of-use capabilities so that engineers can use Vera more effectively to verify the correct operation of blocks, ASICs, and complete systems. Vera can be used with the Verilog-XL, NC-Verilog, VCS, Frontline, and Speedsim simulators, as well as with Quickturn emulators. The new source-level debugger allows users to observe and control the many concurrent operations that may be going on at once in testbenches that exercise designs thoroughly. It has a flexible graphical interface that is based on industry-standard Tcl/Tk, which is also compatible with standard Verilog graphical debugging environments. Engineers can, for example, set breakpoints, see the different parallel contexts, or find out about the status of different threads of execution as they thoroughly validate the design. Vera 3.0 is available now for Sun Microsystems and Hewlett-Packard platforms. Unit prices for floating licenses range from $7,500 to $27,500. Systems Science Inc., Palo Alto, Calif. Contact (415) 812-1800, info@systems.com, or www.systems.com.

PCB design solution A printed circuit board design tool, OrCAD Layout Engineer's Edition enables engineers and others who don't require an autorouter to electronically communicate electrical and mechanical constraints to the physical specification of the circuit board. It enables engineers to define placement, perform critical routing, review designs, and design complete circuit boards when autorouting is not needed. A subset of OrCAD's layout product family, it has complete database compatibility with all family members, providing the necessary functionality to create or modify a design and works in conjunction with OrCAD's design entry applications, OrCAD Capture and OrCAD Express. OrCAD Layout Engineer's Edition is targeted at geographically dispersed design teams and at teams that outsource their board design, as data can be transferred electronically without translation. It is priced at $2,995. Product training and education are available through OrCAD's Professional Services Group. OrCAD Inc., Beaverton, Ore. Contact OrCAD Direct at (800) 671-9505, info@orcad.com, intl@orcad.com, or www.orcad.com.

C++ visualization tool Wind River Systems and Objective Software Technology introduced Look! for Tornado, a dynamic visualization tool for graphically exploring embedded and real-time C++ programs while they are being executed. Based on OST's Look! for the traditional C++ programming market, Look! for Tornado enables embedded developers to see and debug C++ applications as they were originally designed--as a world of interacting objects. It provides multiple, animated views of the structure and behavior of executing C++ applications. It graphically displays the objects that exist, their interrelationships (reference and creation), and interobject communication, while it statically filters classes, functions, or modules that aren't of interest. All of the run-time graphical views are synchronized with a source-level debugger and provide point-and-click access to the application details. Look! for Tornado also provides common static views, such as class inheritance hierarchies. It will be available for Unix, Windows 95 and Windows NT host platforms, and more than a dozen target processor families in the third quarter of 1997. Pricing starts at $5,000 for one user; an additional user costs $2,500. Wind River Systems Inc., Alameda, Calif. Contact (800) 545-WIND, (510) 748-4100, inquiries@wrs.com, or www.wrs.com.

Boundary-scan tool A boundary-scan (IEEE 1149.1 JTAG) tool set, the Asset system features ScanPort, which allows Asset to be integrated with third-party test executives without requiring additional programming by the user. ScanPort integrates the Asset test, diagnostic, and in-system programming capabilities into test executives like National Instruments' LabView and LabWindows/CVI or Hewlett-Packard's HP VEE. ScanPort eliminates the requirement for user-developed programs to link the boundary scan to the test executive by using a dynamic link library (DLL) to automatically run Asset tests and diagnostics under the user's test executive. ScanPort is available now. It is included with all Asset base systems at no additional cost. The base systems start at $5,495. Asset Intertech Inc., Richardson, Texas. Contact (972) 437-2800, sales@asset-intertech.com, or www.asset-intertech.com.

Windows memory modeler Denali Software introduced versions of its Memory Modeler for Windows 95 and Windows NT platforms. The software allows designers to create models for new memory components or existing cores. Memory Modeler's class-based architecture provides designers with the structure for tailoring models to key specifications of the memory. It provides a rich modeling environment, accurate models, and debugging capabilities that are integrated with Verilog and VHDL simulators. Designers can characterize the features and timing of designed and manufactured memory parts with an interactive fill-in-the-form interface. Interactive debugging and testbench support accelerate debugging and regression testing. Class-based, object-oriented models include DRAM, SRAM, SGRAM, SSRAM, flash, PROM, and FIFO devices. The simulators supported include Cadence's Leapfrog and Verilog XL; Frontline Purespeed; Model Technology 's V-System; Speedsim; Synopsys 's VSS; and Viewlogic 's Fusion, Vantage Optium, and Chronologic VCS. Windows 95 and NT pricing starts at $5,000. Denali Software Inc., Palo Alto, Calif. Contact (650) 325-7241, sanjay@denalisoft.com, or www.denalisoft.com.

Cores for FPGAs Two more Customer Solution Cores (CSCs)--for high-speed data communications and telecommunications functions--have been added to the ORCA FPGA family. The cores are precoded, pretested, and preverified building blocks. The new ATM physical layer core complies with the ATM cell-based communications protocol and features 155.52 Mbit/s ATM line operation. The Utopia core, which implements the Utopia interface specification, supports both Utopia Level I and II operation at up to 50 MHz. Both cores are supported by industry-standard synthesis and simulation tools, as well as by ORCA Foundry FPGA layout software. The design package for each core consists of VHDL source code, a VHDL testbench, scripts and data files for behavioral and gate-level simulation, synthesis, and FPGA layout. Detailed documentation, including reference guides and user guides, are included. The ATM Physical Layer CSC is priced at $30,000, and the stand-alone Utopia I/II CSC costs $7,000. Lucent Technologies Inc., Allentown, Pa. Contact (800) 372-2447, Dept. R41, or www.lucent.com/micro.

Accelerated HDLs An upgraded Verilog mixed-level simulator, the Gemini CSX 1.31 features enhanced SDF back annotation for full-timing capability and dump port support for increased visibility into designs. It provides an optimized interface between the Verilog-XL environment and Ikos's NSIM hardware accelerator. An upgrade of the Voyager VHDL simulator, Voyager 2.5, provides interoperability and flexibility through support for the Foreign Procedural Interface (FPI). FPI eases the integration of add-on solutions into users' design flows. The Voyager Series of VHDL simulation products includes Voyager VS, a VHDL software simulator; Voyager CS, a mixed-level software simulator; and Voyager CSX, a mixed-level software simulator with seamless integration to NSIM. Pricing for the Gemini CSX starts at $25,000. Voyager VS starts at $9,500, Voyager CS at $22,000, and Voyager CSX at $27,000. Ikos Systems Inc., Cupertino, Calif. Contact (408) 255-4567 or www.ikos.com.

High-density configuration EPROM The EPC1441 configuration EPROM with 441 kbits of storage was designed to hold configuration information for PLDs containing up to 30,000 gates. It is 72 percent larger than a 256-kbit EPROM and is expected to replace multiple EPROMS for PLD designs of 1,000 to 30,000 gates. The EPC1441 is available in a 32-pin TQFP, an 8-pin plastic DIP, and a 20-pin PLCC package. The 100-unit price is $3.50 each. Altera Corp., San Jose, Calif. Contact (408) 544-7000, info@altera, or www.altera.com.

integrated system design  October 1997