Viewpoint

Language Fusion How the industry can address tomorrow's goals today. by Bill Fuchs

The HDL war between Verilog and VHDL is not over. A victory has not been attained. Although many believed the war was between Verilog and VHDL, in actuality it was between traditional design and top-down design. The HDLs were at war not with each other but with the notion of converting the entire electronics industry from the traditional low-level design methodology to a higher level approach.

Along the way, the HDL zealots lost focus and declared war on each other. With outrageous assertions and market posturing, each suggested that their own method was superior. The conflict was exacerbated by enormous funding from EDA vendors who were eager to compete from the sidelines. However, when the dust settled, a real victory still remained elusive.

The actual goal has not been achieved. There are still more designers doing their work traditionally than via a "top-down" HDL-based process. Dataquest (San Jose, CA) estimates that there are 6,000 HDL users today and there will be more than 60,000 added in the next few years. This means the war has been only 10 percent effective so far.

In the midst of this, however, grows a new concern: language obsolescence. We all know that both HDLs have their advantages and limitations. Although each HDL has been enhanced and improved over the last ten years, they are both approaching 20 years since their original development. They were both developed at a time when design was vastly different and far less complex than today. The resources required to keep HDLs current with the design needs of tomorrow are becoming more and more expansive.

What should the course for language-based design be?

What do we need to do to address the technology of the future?

We have all learned a great deal about language-based design in the last ten years. We now have the experience, the information, and the know-how to develop all of the language capabilities required to address design for the next 25 years. There are strong attributes inherent in both Verilog and VHDL. These characteristics should be applied to form the basis or foundation for a wholly new design specification. We must address this problem soon or we will be caught in a very costly dilemma--supporting our latest technological development or supporting our own design legacy.

Our goal will be to construct a new specification that will meet most of the technology goals for the next 25 years. A new specification should have a Verilog-like focus for addressing the technology deployed in commercial-based designs and an organization for structure and control, as found in VHDL. This is not a recommendation to have an amalgamation of the two languages, or an assumption that we must re-invent the wheel, rather it is a challenge. The challenge is to take existing intellectual properties, our experience with HDLs, our collective know-how, and the predictable path of design technology for the future, and address the technology goals of tomorrow...today.

Bill Fuchs is president and CEO of Simucad (Union City, CA).

To voice an opinion on this or any Integrated System Design article, please e-mail your message to michael@isdmag.com.

integrated system design  January 1997