TOOLS AND TECHNOLOGIES Products and services for system design

Verification tool Mempro, a verification tool for complex ASIC and board designs, creates models of complex memories "on demand." Designers use the tool's Windows-based GUI to enter the parameters of the memory they would like to model, and the tool creates a model with the appropriate level of abstraction. Memory function and timing are provided by a source HDL description (Verilog or VHDL), and a binary core handles complex control and interface functions. The models are created based on industry standards for memory device functionality. The tool's testbench commands link with existing HDL testbenches to perform a variety of operations, including memory preloading and dumping, specific address reads (peek) and writes (poke), on/off X checking, and flexible message filtering. Packages are offered on either a time-based or a perpetual license basis, for both single users and multiple-user design teams. Pricing starts at $5,950, and the tool is available now. Synopsys is offering a free evaluation copy on its Web site. Synopsys , Inc., Beaverton, Ore. Contact (800) 34-MODEL or modelinfo@ Synopsys .com.

Coverification tool Designed for use with traditional in-circuit emulators, the Coretap coverification development platform aids presilicon debugging, test, and integrating microprocessor core-based ASICs. The portable networked instrument provides real-time visibility early in the design cycle by showing the interaction of IP, physical hardware, and embedded software with the processor core. The evaluation tool set includes 32 Mbytes of memory, 2 Mbytes of flash memory, and an LCD display interface for testing driver software and hardware common to system-on-a-chip applications. Also included are a serial channel that can act as an IrDA driver or debugging port, an Ethernet channel that provides for TCP/IP drivers and allows a high-speed link to the hardware simulation environment, and a PCMCIA interface to develop driver software. Coretap is the result of a joint development agreement with Viewlogic Systems, Inc. Initially, it is available for the ARM 7 processor, with subsequent processor-specific tool sets scheduled for later in the year. Prices start at $20,000. Applied Microsystems Corp., Redmond, Wash. Contact (425) 882-2000 or www.amc.com.

Design libraries Revised specifications of libraries recently released for VLSI Technology's 0.25-µm (0.2-µm L effective) VSC9 and 0.20-µm (0.15-µm L effective) VSC10 manufacturing processes include a shrinking of the contacted metal pitches, an improved ability to handle mixed-signal applications, and the ability to accommodate 5-V-tolerant I/O signals. The VSC9 and VSC10 core libraries each contain over 600 cells covering all major logic functions. Each logic function comes in four drive strengths. Also included are I/O elements, memory compilers, and mixed-signal functions. The VSC9 technology is optimized for 2.5-V operation, but the I/O blocks are designed for 3.3-V interfaces. The VSC10 technology is optimized for 1.8-V operation and supports both 3.3-V and 5-V I/Os. Commercial production for the VSC9 process is scheduled for early this year; the VSC10 process is to be available commercially in the second half of the year. VLSI Technology, Inc., San Jose, Calif. Contact www.vlsi.com.

Synthesis tool upgrade FPGA Express 2.0 offers improved quality of results (QOR) in both timing and area, extensive constraint management, faster compilation times, integrated text editing, and greater architecture-specific vendor support. Two new features are FPGA Time Tracker and an option to synthesize for speed or area. Based on core technology from the Primetime static timing analyzer, FPGA Time Tracker, is an interactive timing estimator and debugger that estimates timing delays after synthesis, enabling the designer to identify and resolve timing issues before spending time with FPGA place-and-route tools. Initial beta test results show a typical boost in QOR of 5 to 10 percent, depending on the silicon architecture and design type, and the tool typically runs 20 to 100 percent faster than its predecessor. It is available now. Pricing starts at $12,000; existing FPGA Express customers with maintenance contracts will be upgraded at no additional cost. Synopsys , Inc., Mountain View, Calif. Contact (650) 962-5000 or www. Synopsys .com.

Embedded tool set The High C/C++ ARM Embedded Toolset for developing embedded system applications for Advanced RISC Machines' family of 32-bit RISC microprocessors includes a C/C++ compiler, assembler, linker-locator, and run-time libraries with source code. The tool set is compatible with the Trace 32 debugger from Lauterbach, Inc. and runs on PC and Unix platforms. Features include on-line HTML-oriented documentation, optimizations specifically targeted at the StrongARM variant, big- and little-endian support, optimizations for code size minimization and execution speed, and source compatibility with a wide variety of other High C/C++ tool sets. Single-user license fees start at $2,495. Metaware, Inc., Santa Cruz, Calif. Contact (408) 429-6382, info@metaware.com, or www.metaware.com.

PCI interface FPGAs A new version of the XC4000XLT FPGA family is optimized for the 32-bit, 33-MHz PCI interface, allowing designers to build a fully compliant PCI system with a maximum sustained bandwidth of 132 Mbytes/s. The new XC4000XLT-09, for example, supports fully 3.3-V PCI-compliant designs; offers, in addition to the PCI core, up to 124,000 system gates for the user's own design; and is 15 percent faster than its predecessor. The new devices feature the positive input signal clamping function required by the PCI specifications for 3.3 V and accommodate Xilinx's Logicore PCI v2.0. The XC4013XLT is available in a PQ208 package; the XC4013XLT, the XC4028XLT, and the XC4062XLT come in HQ240 packages; and the XC4062XLT is available in a BG432 package. Pricing begins at $51.45 each in 100-piece quantities. Xilinx, Inc., San Jose, Calif. Contact (408) 559-7778 or www.xilinx.com.

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integrated system design  February 1998