viewpoint

Rapid Time to Production and ASICs Aren't Mutually Exclusive New companies and technologies challenge the claim that FPGAs and CPLDs are faster and easier to produce than ASICs. by David P. Lautzenheiser

The mainstream ASIC user, with annual volume needs between 1,000 and 100,000 units per design, is responsible for the largest number of design starts per year. Because gate array technology has moved toward commoditization and traditional gate array vendors have begun to look to other markets for more lucrative rewards, new options must emerge, particularly with increasing pressures to move new products rapidly into production. The mainstream ASIC landscape, formerly served by gate arrays, is wide and varied; trying to force-fit applications to high-gate-count programmable logic or to standard cells can't alone address the needs of designers.

FPGAs and CPLDs have been touted--especially by their vendors--as the solution for the gate array market. Most analysts, and many ASIC vendors, cede the low-gate-count market to programmable logic. However, as many a designer has discovered, programmable logic often falls short of the mainstream needs--especially in the 100,000-gate and above range. Promises of high performance, real ASIC gate capacity, and time-to-market ease are often unattainable. Fortunately, an emerging generation of ASICs addresses the entire range of mainstream designs.

The new "mainstream" ASICs supply the performance, size, and cost advantages of gate arrays and add value by reducing the time required to complete a design and run timing convergence, testing, and silicon turns. For example, laser-programmable gate arrays offered a 24-hour turnaround for laser-based prototyping. Now, module-based arrays that can be customized using a single metal layer have laid the groundwork for one of the first fabless ASIC companies--a fast ticket down the process migration line. In addition, top-metal-only customization makes silicon turns fast and relatively inexpensive.

By reducing time to production, the new mainstream ASICs actually offer FPGA- and CPLD-like responsiveness for a broad spectrum of designs. Although high-end programmable logic is increasing in capacity, the needs of the mainstream designer are moving toward not only greater capacity but ever higher performance. More than 50 percent of mainstream designs require in excess of 50,000 ASIC gates; as such, programmable logic becomes too expensive for anything other than emulation, even if it does meet the performance demands.

Unlike gate arrays, the newer ASICs are designed to move down the process curve. Devices built with a 0.35-µm CMOS process are readily available today, and plans are in place to migrate to 0.25 µm in early 1999. The dice are dramatically smaller and faster than FPGAs and CPLDs for any given gate count, and mainstream devices offer 10 to 15 times the real gate density with 3 times the performance on a given process technology. Other new features also improve time to production. For example, innovative 100 percent stuck-at fault coverage without user test vectors can reduce the design time by up to 50 percent, and new device architectures can support timing convergence in days, not weeks or months--even at higher gate counts.

More than one system company with Comdex on its mind has discovered the sad truth that programmable logic can't always meet mainstream needs. With deadlines approaching as summer drew to a close, though, the rapid time to production available from aggressive new ASIC vendors meant that there was time to migrate designs to an ASIC and still exhibit at the show.

At the high end of the mainstream market, designers are finding that standard-cell and legacy gate array vendors are becoming more exclusive in their choice of customer. Many vendors require high minimum volumes. Therefore, many high-end, high-I/O-count designs in markets such as computing and data switching must find other chip platforms for their designs. The decidedly non-programmable logic market is also taking advantage of the newer mainstream ASIC products.

The mainstream deserves the attention of the ASIC vendor community. It's the home of many high-ticket, midvolume products such as network switches, medical instrumentation, and Internet infrastructure equipment. The new types of ASIC devices now available provide choices that add to design options while providing the time-to-production advantages typically ascribed to FPGAs--even at the high end of the mainstream market.

David P. Lautzenheiser is the vice president of marketing at Lightspeed Semiconductor in Sunnyvale, Calif. Before joining Lightspeed, he held a variety of marketing and sales positions at Xilinx.

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integrated system design  November 1998