asic issues

Accommodating Analog and Mixed-Signal Blocks in a System on a Chip Various techniques can help designers who want to include analog circuitry on a system on a chip. Don't forget to weigh the trade-offs, though. by Tets Maniwa

As the system on a chip becomes an increasingly realistic concept for mainstream IC designers, the requirements of the rest of the universe intrude upon the designer. Any system that receives inputs from the physical world needs to transform the physical inputs into electronic signals, while configuring the signals that drive physical outputs to operate appropriate loads.

The real-world signals that we need to process represent physical quantities like pressure, acceleration, and temperature. Transducers usually generate raw signals that are in the microvolt to millivolt range--well below the resolution of a 10-bit A/D converter--so direct digitization is out of the question. In addition, many "digital" applications, like Ethernet and hard-disk servos, exhibit signal characteristics that require extensive analog processing prior to the digital operations. Other signals can't tolerate the latency and delays that the conversion and digital signal processing require, so much of the signal processing--amplification and band limiting, primarily--must occur in the analog domain.

To condition the signal for the digital sections, the analog sections will need a gain of 40 to 120 dB (a voltage gain of 100 to 1 million) with a similar total dynamic range. The signal processing may be nonlinear to reduce the dynamic range to the available bit resolution in the digital portions of the circuit.

In a similar manner, the band-limiting functions are necessary to prevent aliasing and to simplify the DSP functions. The design tasks for the analog portions of the design are at least as complex as the digital portions, even though the analog probably constitutes less than 1 percent of the total design.

When the system-on-a-chip design includes analog and mixed-signal functions, some of the design problems become much more difficult. The proximity and high level of interactions of devices on the substrate create increasingly difficult design challenges. If the system requires high accuracy and precision, then one option is to place the analog circuitry on a separate chip. Otherwise, the fairly basic techniques enumerated here can help the designer navigate the complexities involved in obtaining good analog and mixed-signal performance from a single IC.

Because performance problems caused by noise, ground bounce, and signal integrity are creating problems in the ICs, they have risen above the design horizon of the logic designer. The problems used to be the province only of high-speed board designers; now they're affecting the on-chip signals. Even though the noise immunity of a logic circuit is roughly half of the supply--and greatly exceeds that of an analog circuit--the very large number of high-speed signals threatens noise and signal integrity. As supply voltages continue to decrease, the logic noise immunity and thresholds also decrease, while the faster edges and larger number of simultaneously switching signals generate much more noise. If the digital portions of the circuit can't handle noise and interference problems with noise immunity measured in volts, then imagine the problems that can occur in an analog circuit with millivolt sensitivity and very high gain.

Noise

Circuit noise originates in a number of sources. The digital switching noise is resistively coupled through the substrate, capacitively coupled between the interconnect, and even inductively coupled from one part of the circuit to another, especially through long lines and such large nets as power supply and clock. The subnanosecond rise and fall times for the internal gates contain fundamental and harmonic frequencies with significant energy in the hundreds of gigahertz range.

A Fourier series--the sum and differences of the harmonics of the fundamental frequency--can represent any signal. The type of waveform determines the relative weighting for each harmonic. The analog designer needs at least five frequency components to represent a square wave with good fidelity. For example, a square wave uses the odd harmonics of the fundamental frequency, with each harmonic having a relative amplitude of one over the harmonic order. The eleventh harmonic is the fifth nonzero harmonic in the series and is weighted as 1/11th of the amplitude of the fundamental. The lower the duty cycle, the greater the number of very high frequency components necessary to represent the waveform. Even though a very narrow pulse may have a fundamental frequency of only a few hundred kilohertz, it requires more high-frequency components--possibly ranging into the hundreds of gigahertz--because the working fundamental frequency is equivalent to a square wave of twice the period of the shortest pulse.

The analog and mixed-signal sections of the design take into account the special requirements of their unique signal domain. The high gains and the wide dynamic range required of the analog circuits make noise, ground bounce, and signal integrity even more significant for the analog signals than for the logic circuits. One technique that minimizes the effects of the digital noise is to process as much of the analog signal chain as possible in a differential mode. Because noise tends to be correlated, a differential signal processing chain--which works with differences in signals--sees the noise as common-mode and ignores the noise that lies on both sides of the differential signals. The disadvantage of using differential signals is that the technique doubles the number of input lines and passive components, creating a need for more difficult (external) analog circuitry. In addition, if the signals don't already exist as differential signals, the designer will need to perform a single-ended­to­differential conversion, then a differential­to­single-ended conversion somewhere in the signal processing chain.

Layout

A single IC incorporating the complete system on a chip will require special design considerations to address the unique requirements of the analog sections. The inclusion of the analog functions greatly increases the design and layout complexity because of the great difference in the electrical environments of the different signal domains. The electrical issues for low-noise circuit design are complex enough to warrant separate coverage. From the CAD perspective, however, the layout issues are absolutely horrendous.

Most IC manufacturers have special design rules for analog and mixed-signal circuitry on a mixed-signal chip. Some of the rules depend on the mix of signal types. A mostly analog IC--"big A, little D"--tends to use the analog design rule set, which sacrifices the area, device density, and interconnect to achieve better analog performance. The digital sections, which don't materially affect the total area, are probably fairly low performance digital interface functions like status, handshake, or function control signals.

For a mostly digital IC--"big D, little A"--the issues are much more difficult. The IC is more likely to be pad-limited--the number of peripheral pads determines the total area available--so placing the analog sections on the IC exacerbates the full-chip layout and integration problems by further restricting the available space. Most of the design rule variations for analog functions in a digital part require significant die area.

Designer tips

The physical design requirements greatly influence the distribution of area and routing resources. The techniques presented below not only contribute to the layout complexity by forcing additional design constraints, but consume a disproportionate area as well, given the number of devices in the circuit. An analog section might represent just 1 percent of the design from an electrical perspective, but it might use 4 or 5 percent of the area on the die for its functions and I/Os while requiring as much design time as the rest of the circuitry. Nonetheless, these techniques provide designers with essential shelter from the noise that might otherwise cripple the analog portions of a system on a chip.

First, keep all high-level signals away from high-gain inputs. That technique enforces a "dead zone" around the analog sections and reduces the amplitude of the input noise. In addition, the layout should contain separate substrate contacts and guard rings around the analog section, as well as place analog sections at the pads to keep signal lines as short as possible. Unfortunately, that technique ties up pads and routing resources; blocks routing channels, causing routing congestion in other areas of the layout; and may make the pin-out assignments more difficult. The isolation for the guard rings may also require unique design rules and special wafer processing.

Another important technique is to separate analog and digital power supplies and grounds with a single common connection at the power supply. Separation minimizes the noise coupling and interaction between the analog and digital supplies. On the downside, adding additional pins for the separate supplies uses up routing resources and I/O pads while increasing board and system complexity.

Try to keep digital signals out of the high-gain sections and front-end electronics by using a sample-and-hold or a track-and-hold circuit before the converter. Though the additional circuitry may be very difficult to implement on the chip, it could offer a substantial payoff: a much quieter signal for the analog sections of the IC to process. Unfortunately, the sampling circuits are very sensitive to clock timing and jitter and therefore may not be very good with very high precision signals or with any signals where the digitization timing is critical. Nonetheless, in slightly less demanding applications, the technique offers a smooth ride.

All those rules of thumb for analog circuits help the circuit meet specifications. The design trade-offs come because many of the rules are mutually exclusive. For example, a common practice develops total gain in multiple stages, whereas another minimizes gain stages to keep noise and errors to a minimum.

If system-on-a-chip designs are a part of the future, then the system designer must start to account for the analog portions of the circuitry. The designer should convert those portions of the signal processing chain that need to be stable and repeatable to the digital domain. In other cases, careful attention to noise-reducing design and layout techniques can help to produce successful mixed-signal systems on a chip.

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integrated system design  February 1999