editorial

What Does Design Reuse Take? Changes in a company's design methodologies are only part of the total design function, but they may very well be the easiest part of the whole process. by Tets Maniwa

In the past few years, we've heard a lot of noise and bluster about design reuse via previously designed building blocks or intellectual property. The great dilemma of nanometer designs is that the designers need to do much more work to ensure a successful IC, but have less time to perform that work. A number of obstacles have impeded more rapid adoption of the concept of reusable designs. One impediment is the engineers' attitude that their job is to design new circuits. They know that even great engineers can't reuse something they don't understand, and existing design blocks don't include the information necessary to help the next user comprehend the original designer's intent and code. Engineers, after all, know that they're reviewed for finishing the designs on time--not for writing clear and complete descriptions of their work.

Another stumbling block has been the lack of infrastructure and standards to support redesign efforts. Every company has different standards for internal work in terms of coding styles, appropriate language subsets, and even such minutiae as naming conventions. In fact, many of the large IC manufacturers have found that different design groups can't exchange their own designs.

Yet another factor is that tools and methodologies for design reuse have remained unavailable. One reason for their absence is the extra effort required to make a design reusable, which often doubles the design time of the original project. The extra work includes not only the basic design and documentation, but also the synthesis scripts, test benches and expected results, manufacturing test setup and vectors, and a myriad of other details for the follow-on designers.

Fortunately, a number of the tools and technologies for encapsulating a function and creating the many views necessary to use the blocks are just now starting to appear as commercial products. The penalty for designing for reuse on the first project is decreasing through the application of standard practices and methodologies, as well as automation of the creation and support of the backup materials. One company that has been putting a lot of time and energy into design reuse is Fujitsu Microelectronics. It's been working on the infrastructure issues by becoming one of the founding members of both the VSIA and Rapid, two organizations that are trying to address the standards for design reuse in an SOC. It participates actively in the VSIA's steering and development working groups to help the standards processes. In addition, it contributed the format for Rapid's IP catalog.

While helping the industry develop the basic infrastructures, Fujitsu has also been working on strategies for internal and external building blocks, developing an IP database and acquisition procedure, and most importantly, working on a worldwide system LSI development technology for all of its development facilities. The result is a mixture of industry-standard and internally developed tools glued together by a Web-based engineering framework, a common software interface across the entire tool suite, and a common library structure. Because Fujitsu isn't transferring whole design files, but rather just the flows and controls, the design infrastructure can currently handle designs of up to 10 million gates.

The realization that new system-level designs will also require software development at the same time as the hardware meant that Fujitsu would need to have not only RTOs, drivers, and firmware for the embedded cores, but also a way to simulate the operation of that software on virtual prototypes of the systems under development. The cover story (p. 14) illustrates the changes Fujitsu instituted to develop its SOC architecture, describing some of the tools that make up its newly developed internal structure.

To complete deployment of the new design methodologies, Fujitsu must now struggle to change engineering perspectives from today's limited respect for reuse to tomorrow's embracing of the concept that everything is potentially reusable. Unless the other IC manufacturers put in equivalent efforts to break away from existing methodologies and add in necessary new analysis steps and tools, design reuse will continue to be like the weather--everyone talks about it, but no one does anything about it.

Please let me know what you think by sending your comments to tets@isdmag.com.