The Interoperability Express

EDA companies demonstrate a growing maturity by moving to minimize proprietary formats.

by Tets Maniwa

As the EDA industry matures, we are seeing more efforts to make tools work together. For SOC design, the growing consensus has it that standards are just not enough--the industry needs to take on more responsibility for the exchange of design information. We see increasing levels of corporate maturity evidenced by the proliferation of partnership programs and a realization from the EDA vendors that proprietary formats hurt the end users if they act as barriers to competitors. The opening of some previously closed formats as de facto standards lets the users plug in the best-of-breed tools for detailed and essential post-processing and analysis necessary in nanometer geometries.

The willingness to address the problems of interoperability peaked last year when Cadence, Mentor, and Synopsys all started to license proprietary formats and data to other companies. The impetus for openness comes from the design community, which spends a large part of its software budget on data migration, translation, and data clean-up of files imported and exported to other programs by way of defined standards like EDIF and SDF; the number and relative intensity of the interoperability initiatives has increased tremendously. For the first time, companies are giving third-party vendors and even direct competitors access to detailed data sets. Unfortunately, many of the programs are a little light on useable results. The partner gains access to the tools and formats, but no assistance in defining use models or identifying key interface points.

Synopsys offers a number of programs for exchanging or licensing data formats. The TAP-in program, a new approach to interoperability, licenses the underlying formats to other companies. One example is the Liberty program, which licenses the .lib and Stamp formats. Now about 20 EDA vendors are licensees. Industry-wide, we see about one press release per month on Liberty program releases. For example, Xilinx and Mentor just agreed to use Stamp for large FPGA designs. Another partner, Exemplar, is asking for other extensions in the formats to give better support for FPGAs. The company competes directly with Synopsys, but nonetheless finds value in working to support useable standards.

According to Rich Goldman, senior director of Strategic Market Development at Synopsys, most of the effort in the early partnership programs was passive. The In-sync program, like most other programs of its type, is exclusionary, making it difficult to gain good access to the tool developers. The In-sync program lets the partner obtain a license for the tool and then leaves the partner on their own to figure out how to interface to the tools. Fortunately, the various programs do overlap somewhat. But Goldman says that EDA vendors should continue to take more responsibility for the interoperability of their tools.

In addition to the individual company programs, the Electronic Design Automation Consortium (EDAC) has defined a new program to improve interoperability with help from Cadence and Synopsys, the Spine 99 program. Because synthesis and place-and-route tools need to work together to attain timing closure, they are considered the backbone of all contemporary design methodologies. Spine 99 isn't a clever marketing acronym, but instead an acknowledgement of where these tools fit into the design flow--and their importance to the design effort.

Cadence and Synopsys are developing a set of open formats to enhance Design Compiler and Silicon Ensemble interoperability. These formats--using Liberty formats and Synopsys design constraints (SDC)--will allow users to easily enter and exit either or both tools in their design flow. By defining open formats, the companies are establishing clear interoperability points. Currently the two companies are doing detailed work on documentation and application notes to describe how to use the tools, which will define a better flow for all users.

Joe Xi, vice president of products and marketing at Ultima Interconnect Technology, says the value of the TAP-in and Spine 99 programs lies in the cooperation and details of the interfaces. He is looking into enhancements for transistor-level analysis. Faysal Sohail, president and CEO of Cadabra Design Automation, says that as a part of their alliance partnership program to ensure customer success, they are providing a validated methodology that promotes interoperability between EDA tools used in library design and development. In short, the interoperability picture is looking better all the time, and may some day allow designers to purchase any tools, confident in their compatibility.

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