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Exemplar Logic, Inc. (Fremont, Calif.) is now a wholly owned subsidiary of Mentor Graphics Corp. (Wilsonville, Ore.). Previously, Exemplar Logic operated as a partially owned subsidiary of Mentor Graphics. Exemplar has added the Leonardo Spectrum FPGA synthesis tool suite to Mentor's HDL Design Division. Exemplar will continue to honor and support all existing distribution and OEM agreements.

Lucent Technologies (Murray Hill, N.J.) and Chartered Semiconductor Manufacturing Co. (Singapore) have agreed to jointly develop fabrication processes for high-performance copper and aluminum interconnects in next-generation CMOS (0.18-µm/0.16-µm) integrated circuits. The companies expect to begin prototyping new devices in the fourth quarter of this year. As part of the collaboration, the two companies will merge the development efforts on Lucent's 0.16-µm and Chartered's 0.18-µm technologies to deliver a common manufacturing process platform using advanced low-k dielectric aluminum and copper interconnects. A team of engineers from both companies will develop the processes at Lucent's R&D facility in Orlando, Fla., then transfer them to Silicon Manufacturing Partners (SMP)--Lucent and Chartered's joint-venture fab in Singapore--for volume manufacturing. The two companies will also be able to implement the advanced processes in any of their individually owned fabs. The jointly developed interconnect technologies will be combined with transistor technologies from either Chartered or Lucent to satisfy the specific needs of their individual customers.

Chartered's U.S. branch (Milpitas, Calif.) has announced the formation of a partnership network that will develop a design environment required for the manufacture of integrated circuits, using its 0.18-µm process technologies. The network allows customers to choose any qualified partner's offering and benefit from a seamless interface to Chartered's 0.18-µm manufacturing process. Under separate memoranda of understanding, Chartered is working with four EDA and IP companies--Artisan, Avanti, Cadence Design Systems, and Synopsys--to provide customers with an integrated design environment. Chartered expects to begin accepting customer prototypes for manufacturing in the first quarter of 2000.

Western Design Center, Inc. (Mesa, Ariz.) and Temple University in Philadelphia have established an SOC design center in the electrical and computer engineering department. WDC is providing a complete hardware and software CAD/CAE system. Temple will develop new course materials for the fifth through seventh semester sequence of undergraduate courses in digital logic design in EE and EET using WDC developer boards.

Kawasaki LSI USA, Inc. (Santa Clara, Calif.) and UMC Group (Sunnyvale, Calif.) have formed a strategic alliance for 0.18-µm process technology developments, including implementations of copper and low-k dielectric layers. UMC will provide Kawasaki with foundry services to support Kawasaki's ASIC and standard products business. Kawasaki has agreed to contract to UMC all ASIC manufacturing that exceeds Kawasaki's current capacity. Kawasaki will begin retargeting its ASIC library to UMC's 0.18-µm process in the second quarter of 1999, and anticipates volume 0.18-µm ASIC production before the end of the fourth quarter.

Synopsys, Inc. (Mountain View, Calif.) has acquired Smartech Oy (Tampere, Finland), an independent provider of SOC design services. Smartech, which employs 35 people and counts among its customers Nokia, Tellabs, and ABB, will retain its current management, personnel, and facilities, becoming a component of Synopsys's professional services operation in Europe. The terms of the transaction have not been disclosed. Under the agreement, Smartech will continue to honor and extend its relationships with existing customers. Engineering center managing director and Smartech cofounder Henri Rantalainen will retain his current responsibilities.

Cadence Design Systems, Inc. (San Jose) has submitted its library exchange format API to Silicon Integration Initiative, Inc. (Si2) as a proposed extension to the Open Library Architecture (OLA) standard. The goal is to accelerate the availability of a single library standard across the entire silicon design flow. The API products are based on enhanced versions of the LEF and DEF formats extended to support the chip assembly requirements of SOC design.

Phoenix Technologies, Ltd. (San Jose) has signed a licensing agreement with Mitel Semiconductor (Kanata, Ont.) to include Phoenix's PCI, USB, and IEEE 1394 IP cores and models as part of Mitel's library of Systembuilder SOC development capability.

LSI Logic Corp. (Milpitas, Calif.) has licensed schematic generation and viewing technology from Concept Engineering GmbH (Freiburg, Germany). LSI will integrate Concept's NLViewTK Widget into its Flexstream design tool environment. Concept's products include NLView, a stand-alone design analyzer that generates easy-to-read schematics from any Verilog or EDIF netlist, and the NLView Widgets, a family of GUI building blocks (Tcl/Tk, MFC, ActiveX, and Java) that can be integrated into logic synthesis, verification, test automation, and physical design tools running under Unix and Windows.

Virtual Silicon Technology, Inc. (Sunnyvale, Calif.) will provide 0.25-µm libraries to Nordic VLSI ASA (Tiller, Norway) in order to expand its ASIC service offerings. As part of the agreement, Virtual Silicon has delivered libraries for TSMC's and UMC's 0.25-µm logic processes. Nordic VLSI will distribute the front-end design kits to its key ASIC customers and provide physical layout and component delivery. Nordic VLSI will also offer turnkey ASIC services, as well as a variety of value-added services including training, logic design and partitioning, tapeout assistance, packaging, and testing services. Nordic VLSI's engineering staff will also be available to support European customers who directly purchase Virtual Silicon libraries.

OrCAD, Inc. (Beaverton, Ore.) is providing unlimited access to its Web-based technical resources to all designers, engineers, and engineering managers, regardless of whether they own OrCAD's products. The company is offering designers worldwide a free software starter kit as well as free access to the OrCAD Design Network (ODN), on which electronics designers can access design, technical, and product data. Users can also chat and share design ideas and data with other engineers in real time and subscribe to Techtips, the company's free technical e-mail news service.

Applied Microsystems Corp. (Redmond, Wash.) has endorsed the Integrated Development Framework (IDF) standards initiative promoted by MIPS Technologies, Inc. (Mountain View, Calif.). The new technology initiative is intended to yield a unified framework for MIPS RISC processor development tools. The IDF will accelerate the development of advanced tool chains for the MIPS RISC platform. The new framework will allow any IDF-compatible AMC debugging and test tools to be integrated with any other IDF tool anywhere in the development tool chain. MIPS will work with development tool vendors, such as AMC, to create and maintain the interface standards that will define the framework.

AMC has also partnered with Tektronix, Inc. (Portland, Ore.) to provide a development environment for high-end processors. The environment includes AMC's PowerTAP JTAG/COP emulator, the Codewarrior and MWX-ICE Integrated Software Development Environments, and Tektronix's TLA700 Series Logic Analyzer with Powerquicc II processor support.

National Semiconductor Corp. (Santa Clara, Calif.) has selected Virage Logic (Fremont) as its embedded memory core supplier for 0.25- and 0.18-µm designs. Memory compilers for 0.25-µm designs have already been delivered and are being used in National's design centers worldwide. Virage's memory compilers for 0.18 µm are also now available. According to the terms of the agreement, Virage will develop Custom-Touch memory compilers optimized for National's semiconductor process. Virage has also licensed to National its patent-pending dual-port cell and array architecture. National is licensing high-density one-port, high-density two-port (2RW), two-port (1R, 1W) Register File memory compilers, ROM compilers, and custom instances. In addition, engineers from the two companies are working closely together to develop new types of memory compilers that National's design centers will use.

The Networking and Computing Systems Division of Motorola, Inc. and Aisys, Inc. (Santa Clara, Calif.) are working together to shorten the time required to develop device drivers and board support packages (BSPs) for such high-end communications processors as the Motorola MPC8260 and MPC860. Through technology exchange and cooperative product development, Aisys will provide system developers--through its Driveway 3DE system--automatic creation of optimized BSPs for Motorola's processors. In addition, Aisys is involved with cooperative training programs with Motorola to help customers learn how to integrate MPC8XX processors into their products, taking advantage of functionality and features.

Motorola, the Electronic Device Group of Mitsubishi Electronics America , and National Semiconductor Corp. have joined the Embed the Internet (ETI) Alliance founded by Emware (Salt Lake City). The ETI alliance consists of 16 microcontroller manufacturers and enterprise application and embedded tools providers. The group is committed to furthering Emware's Embedded Micro Internetworking Technology platform as a standard to connect 8- and 16-bit-based electronic devices into the enterprise management process, providing developers with end-to-end, open standards-based solutions for embedded device networking.

The focus report for the August issue will cover design and consulting services. If you wish to participate, please contact Mike Maisen at mikem@isdmag.com to ensure that you receive the survey. The September focus report will cover design verification.

To voice an opinion on this or any Integrated System Design article, please email your message to jeff@isdmag.com.

integrated system design  May 1999