Compiler
BSD Compiler is an automated tool for synthesis and verification of boundary scan logic in ASICs and ICs. BSD Compiler provides RT-level boundary scan capability as well as implementing and verifying boundary scan logic for
board-level test. BSD Compiler enables boundary scan synthesis, verification and manufacturing vector generation, and ensures that resulting boundary scan designs conform to the IEEE 1149.1 standard. The tool synthesizes boundary scan at the RT-Level using Synopsys
Designware JTAG components which are included in the tool. Once boundary scan logic is synthesized, BSD Compiler verifies the design for compliance to the IEEE 1149.1 standard, and automatically generates the corresponding BSDL database for application
on board-level test equipment. The tool also generates functional and DC parametric vectors for manufacturing test. BSD Compiler is available for the Sun Sparc and HP platforms and costs $30,000. Synopsys, Inc., Mountain View, Calif. Contact www.synopsys.com.
Verification tool TDS Simvalidator
enables early verification of test suites of complex system-on-a-chip (SOC) designs before committing to silicon. The TDS Simvalidator allows designers to use simulation to confirm that the test
vectors and timing specifications targeted to their automatic test equipment (ATE) are faithful to the device design specification. Using the test development database timing specifications and vectors as stimuli to the device model, the simulator completes the test validation loop
before silicon. The TDS Simvalidator uses the TDS Wave-form Data Base (WDB) test suite database as the simulation stimulus. WDB supports more than 80 different tester configurations for TDS-Tester Rules Checking. It supports Cadence
Verilog-XL, and support for other simulators is planned. The TDS Simvalidator uses the Verilog PLI to
access and drive the device model with the TDS WDB. The TDS Simvalidator for Solaris costs $25,000 a seat. Fluence Technology, Inc., Beaverton, Ore. Contact info@fluence.com or www.fluence.com.
Compiler
The new version of the FIR Filter Compiler adds interpolation and decimation functions to the design tool. The FIR Filter Compiler also includes a fixed- point to floating-point coefficient
analyzer. The Interpolation and decimation functions change the effective sample rate of a signal. Decimation is typically used in receivers, and allows users to employ simpler and less-costly analog anti-aliasing filters. It also improves a system's signal-to-noise ratio. Interpolation is typically used in transmitters to
increase the precision and signal-to-noise ratio of a system by adding points to the transmitted digital data. A new fixed-point versus floating-point coefficient analyzer allows users to
evaluate quantization effects via a graphical user interface. The FIR Compiler is available now for $4,995. Altera Corp., San Jose, Calif. Contact www.altera.com.
Laser driver
The MC2064 is a integrated, programmable FP/DFB laser driver
intended for fiber-optic-based communications systems operating at up to 1.25 Gbps. The MC2064 supports DC coupled output at 3.3V operation and is available in TSSOP20, QSOP16 packages, or die form. The outputs may be paralleled for 65mA modulation. Both 3.3V
and 5V
operation is supported. Rise and fall times are substantially below the Gigabit Ethernet requirement of 250pS. The MC2064 consists of a laser bias generator, a modulation current driver, and a high-speed switch and laser malfunction flag. A facility to adjust the pulse width of the laser is also available. The device has differential PECL data inputs and CMOS control inputs. Selecting resistor values programs the modulation current and temperature coefficient. The bias current may be controlled
using a feedback photo detector. Alternatively, the bias current and temperature coefficient may be programmed using external resistors. Microcosm's new laser driver sells from less than $4 each at 1,000 piece quantities to less than $1 each at 100,000 pieces. Microcosm Communications, Bristol, U.K. Contact www.mcosm.co.uk.
Motor/spindle control
IC TDA5345HT is a combination voice coil motor (VCM) and spindle control IC that uses CMOS process technology. Hard disk drives for laptops, removable
disk drives, and the emerging market for appliance disk drives used in digital video cameras and digital still cameras are some of the end products that could potentially use the TDA5345HT. This storage IC has ramp-loading capability, which increases the overall storage space by using the area that alternative solutions require to place the head when inactive. The main functions of the TDA5345HT reduce power consumption by shifting into sleep mode when inactive and therefore only the serial port and power
monitor remain continuously active. The device has a 6-bit DAC to control the start-up current by limiting voltage on the unit's speed loop filter, which optimizes the current during the start-up phase and
extends battery life. An on-chip spindle driver and computation logic provide control functions for a three-phase, brushless, sensorless DC motor in full wave mode. The TDA5345HT also integrates a complete voice coil motor
(VCM) controller designed to eliminate crossover distortion thereby improving the
seek time. This is accomplished though the 12-bit linear DAC and 6-bit offset correction DAC. The TDA5345HT is available now in volume production. Pricing in 10,000 piece quantities is $4.50. Philips Semiconductors Sunnyvale, Calif. Contact (800) 447-1500 ext. 1795 or www.semiconductors.philips.com.
Noise amplifiers
The RF2361 and the RF2362 are both produced using GaAs HBT (gallium arsenide heterojunction bipolar transistor) process technology. The RF2361 functions as a front-end
low- noise
amplifier or as a power amplifier driver amp in the transmit chain of digital subscriber units. The RF2362 is a low- noise CDMA/TDMA PA driver amplifier with a very high dynamic range
designed to transmit digital PCS applications at 1,880 MHz. The RF2361 IC features an adjustable bias current, a high intercept point, and a power-down feature that can be used to turn off the
device completely when used as a PA
driver. When the RF2361 is functioning as an LNA, the bias current can be set externally.
Designed to operate on a single 2.5V-6.0V power supply, the RF2361 can operate directly from a single cell Li-ion battery when used as a power amplifier driver. RF2362 features include low noise, a high intercept point, adjustable bias current, and a power-down control that can be used to turn the device off completely. Both cost under $1.50 per unit in order quantities of 10,000 each. RF Micro Devices, Greensboro, N.C.
Contact (336) 664-1233 ext. 6652 or www.rfmd.com.
Design suite
The Cynapps
Suite is a complete environment for hardware
design in C++ that has evolved from a standard Verilog flow. The Cynapps Suite includes a ęCynthesizerę that automatically produces synthesizable Verilog. The environment consists of the following tools that enable Verilog hardware
design teams to transition to higher-level design while preserving existing Verilog tool investments and code: Cynlib is a C++ class library that includes a simulator and provides the foundation for
hardware design using C++. It's
freely available to designers under an open-source license, and can be accessed and downloaded at www.cynapps.com. Cyn++ is a Verilog-like macro language, implemented by a pre-processor that provides a convenient bridge between C and Verilog. The Cynchronizer translates RTL Verilog code to C++/Cynlib, allowing C++/Cynlib and Verilog code to run in a single environment. Cyntax is a custom lint program that recognizes common
errors in hardware described in C++. The Cynapps Suite is available now for Unix, Linux,
and Sun Solaris platforms. Base price for the complete Cynapps suite is $100,000. Cynapps, Inc., Santa Clara, Calif. Contact (408) 588-4000 or www.cynapps.com.
Embedded PCI controller
The QL5064 PCI controller combines a zero wait-state PCI master with 74,000 system gates of programmable logic and 12.7 kbits of dual-port SRAM. The QL5064 device supports clock speeds up to 75 MHz,
enabling data transfer rates of up to 600 Mbytes per second on the PCI bus. Its three internal 64-bit buses can
run independently at 100 MHz and provide an asynchronous interface at up to 2.4 Gbytes per second to the back-end logic. This feature allows independent PCI and local bus clocks. In addition, the QL5064 is 100 percent PCI-compliant for all
timing specifications. The QL5064 is supported by a reference development kit, which includes a socketed QL5064 ESP device, an MPC 740 RISC processor, compiled drivers for Windows platforms, and source code for the software drivers and applications. Prices are $63 each
for the 33 MHz version and $98 each for the 66 MHz version in 1,000s in the 456-PBGA package. The QV-PCI64-RDK development kit is also available at $1,995. Quicklogic Corp., Sunnyvale, Calif. Contact www.quicklogic.com/products/pci/
5064.
Integration suite
Fastforward is an SOC integration system for rapid development of system-on-a-chip (SOC)-class
designs. Fastforward consists of two major elements Sonics Integration
Architecture (SonicsIA) and Sonics Integration Suite that work together
to
integrate and verify SOCs. Fastforward reduces the interdependencies created between functional blocks. SonicsIA is
a configurable system architecture that facilitates integration of, and communication between, SOC functional, blocks. The modular architecture provides a standardized block interface and communication protocol between blocks such as CPUs, memories, and peripherals. SonicsIA serves each block, including latency and bandwidth, while simultaneously managing address maps,
control flows,
interrupts, and other inter-block communication requirements. Sonics Integration Suite is a set of
integrated EDA tools for developing SOCs that employ SonicsIA. Sonics' tools both configure SonicsIA to meet each
application's specific needs and also
automate generation of the top-level synthesized SOC netlist fully ready to be placed and routed. Fastforward eliminates floorplan, logic, and timing changes to the global interconnect commonly required after the first place-and-route signoff. The Sonics
Fastforward SOC Integration System, including SonicsIA and Sonics Integration Suite, is available for Sun Solaris-based workstations. The fee for a single annual license is $46,500. Sonics, Inc., Mountain View, Calif. Contact (650) 938-2500 ext. 112 or www.sonicsinc.com.
Executive & RTOS
VRTXsa is targeted at advanced applications such as telecommunications switching products and at high-end processors such as Motorola's PowerPC family. VRTXoc is specifically targeted for the system-on-a-chip (SOC)
market and supports popular embedded cores. VRTXsa version 5 delivers memory protection and POSIX compatibility
features. Users can opt to build systems using the POSIX or VRTX interfaces, or can use both simultaneously. VRTXoc is a compact real-time executive created specifically for the SOC market. It
features minimal ROM and RAM consumption and support for power-saving features present in many embedded cores, which are designed to increase battery life. VRTXoc will be available based on a new
community-source business model featuring free source and
binary distribution via the web for development purposes, along with a per-
project buyout for commercial production. VRTXsa version 5 is available for PowerPC and 68K targets. Pricing for VRTXsa starts at $6,750 including a special, integrated version of the Mentor Graphics Xray Debugger. VRTXoc is available free of charge to developers, researchers, and educators. A per-project fee is charged for production licenses. Mentor Graphics Corp., Wilsonville,
Ore. Contact www.mentor.com.
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