Tools and Technology

Products and services for IC and electronic system design

Linux development toolkit An embedded and optimized C/C++ compiler and toolkit for Linux developers enables engineers to prototype their software code on a Linux-based host platform using C/C++ tools designed specifically for embedded development. The CAD-UL C/C++ toolkit for Linux provides a code-generating tool chain for development of embedded applications under Linux. The toolkit features ANSI-compatible C/C++ compilers and the embedded C++ module, a linker and assembler, C/C++ libraries, and a floating-point emulator library. The toolkit supports protected-mode programming, enabling developers to prototype applications for 32-bit x86-based target systems. In addition, the tools support all protected-mode memory models from flat to segmented, which allows developers to select memory management structures for applications. The toolkit also provides support for real-mode programming, allowing developers to use 80x86- and 8186-based systems for target applications. The CAD-UL C/C++ compiler toolkit is now available for a base price of $5,600. The toolkit requires Linux, Kernel 2.0.xx, or 2.2.x under the use of a LIB5 on a PC-compatible host system. The compiler is available for real- and protected-mode targets, including the AMD 186, the sAMD Elan SC400, the Intel Pentium II, and the ST Microelectronics STPC. CAD-UL, Scottsdale, Ariz. Contact (480) 945-8188 or www.cadul.com.

Synthesis tool Version 99.1 of the Leonardospectrum synthesis tool now includes team design-flow capabilities that allow design engineers to develop FPGAs by working together at the block level, incremental synthesis that can accelerate design iterations, new algorithms that enable Leonardospectrum to analyze an entire million-gate design and automatically make chip-level optimizations that reduce area and improve chip performance, and improvements of up to 60 percent in area and timing performance. The tool, available now, features several new technologies from Actel, Altera, Dynachip, Lattice/Vantis, and Xilinx. Prices for node-locked PC versions start at $4,500. The tool runs under Windows NT, 95, and 98, Solaris, and HP-UX. Exemplar Logic, Fremont, Calif. Contact (510) 789-3333 or www.exemplar.com.

Functional verification The Solidify static functional verification tool now includes client-server technology. Targeting RTL designers, architects, and validation engineers building ASICs, IP cores, and programmable parts, Solidify verifies that the intended behavior found in their functional specifications is correctly coded into an HDL. The client-server option for Solidify, available now, runs under Solaris and Windows NT. The option costs $10,000. HDAC, Inc., Alameda, Calif. Contact (510) 864-7587 or www.hdac.com.

SDRAM interface cores A series of SDRAM interface cores is now available for Xilinx programmable logic devices. Developed by Rapid Prototypes of Stateline, Nev., and NMI Electronics of West Midlands, U.K., the cores operate at up to 200 MHz in the Xilinx Virtex FPGAs, and up to 125 MHz in the Xilinx XC9500XL CPLDs. The cores also support the XC4000 FPGA families. Rapid Prototypes is now shipping an SDRAM controller core that works with Virtex, XC4000XL, and XC4000XLA FPGAs. The core supports a 32-bit data path and provides up to 200-MHz performance in both XC4000XLA and Virtex devices, yielding a data throughput of 6.4 Gbps. The core can interface to both SDRAM and SGRAM devices and enables such applications as digital video, real-time image processing, reconfigurable computing, and digital neural networks. The core is available in a netlist optimized for each FPGA family. NMI Electronics is shipping an SDRAM controller core that has been optimized for the Xilinx architecture. A Virtex implementation can take less than 5 percent of the XCV50 FPGA, the smallest device in the Virtex family. The controller includes a VHDL-generic-based configurable SDRAM interface that supports most common SDRAM operating modes. Its synchronous, CPU-compatible interface can be modified to fit the user application. The core architecture supports embedded applications in industrial and telecommunications systems and peripherals such as printers. It is available as VHDL source code. Versions of both the NMI and Rapid Prototypes cores use the on-chip DLL that eases high-performance design by simplifying the clocking scheme and eliminating skew. In addition to the cores from their partners, Xilinx is offering a 125-MHz SDRAM controller reference design for Virtex FPGAs. The design, available in synthesizable Verilog formats, offers a starting point for customers who want to do their own designs but doesn't include the full technical support that comes with the products from the Alliancecore partners. The reference design can be downloaded for free from the Xilinx IP Center at www.xilinx.com/ipcenter. List prices for the cores from Rapid Prototypes and NMI Electronics begin at $1,995 and $4,800, respectively. Xilinx, Inc., San Jose. Contact (408) 559-7778 or www.xilinx.com.

Microcontroller The 15-MHz COP8 device includes a 32-kbyte EPROM and EMI-reduction circuitry. The COP8SGR targets serial data control applications for desktop phone systems, electronic metering, car radios, remote controls for consumer appliances, and controllers for security systems and fire alarms. The COP8FGR7 contains on-chip power-on reset, an on-chip RC oscillator that provides four clock options, full duplex UART/USART functionality, two analog comparators, a watchdog and clock monitor, up to eight high-current outputs, an idle and halt mode, a multi-input wake-up function, and a Microwire/Plus serial interface, among others. The device also is available in an 8-kbyte EPROM and 256-byte RAM alternative for further cost-reduced applications. Also on board are three 16-bit timers, each supporting a processor-independent PWM (pulse-wide modulation) mode, as well as an external event counter and an input capture mode. There are also 8 bytes of user storage for serial numbers, data codes, and other data. The 15-MHz COP8FGR7 family is available now in a variety of windowed and plastic packages over the industrial temperature range of -40 to 85 degrees C. Package types include 28-pin SO, 40-pin DIL, 44-pin PLCC, and 44-pin PQFP. Pricing in 1,000-unit quantities ranges from $3.83 to $5.63 each. National Semiconductor, Santa Clara, Calif. Contact www.national.com/cop8.

Placement and routing technology CE-Creator is a self-contained integrated PCB placement and routing environment that is specifically designed for complex, high-density PCBs. CE-Creator uses a suite of automatic and semi-automatic gridless placement tools to increase the productivity of PCB designers. The placement task is divided into three areas: whole-of-board constraint-based simultaneous placement, sequential placement, and a set of optimization processes that can be used with either or both of the placement techniques. CE-Creator uses gridless, 45-degree routing algorithms, optimized to enhance electrical signal performance and keep routed length to a minimum. 'Escape' algorithms within a fan-out pass enable CE-Creator to perform routing of complex, tight arrays of pins such as those found on BGAs (ball grid arrays), flip-chips, chips-on-board and some complex connectors, without the need to hard-code device fan-out within the layout system library. The CE-Creator-HS performs impedance and delay-controlled routing using a 2D field solver (transmission line calculator) to characterize the wires on the board. For delay, the tool calculates the phase velocity and derives the required length. The length is used to control the router, which can be verified after routing. CE-Creator and CE-Creator-HS, available now, run under Windows NT 4, HP-UX 10, and Sun Solaris 2.6. CE-Creator costs $19,950 and the CE-Creator-HS $26,950. Incases North America, Aurora, Colo. Contact (303) 750-8171 or www.incases.com.

FIB system The IDS P3X is a focused ion beam (FIB) instrument used for device modification and probe point extension for 0.18-µm process technology. The tool allows access to interconnects for e-beam probing and mechanical analog probing. The system addresses every major FAB process, including conductor deposition, insulator deposition, metal etch, and dielectric etch. With the capability to contact first metalization (M1) on a six-metal-layer device, the system enables mask cycles to be minimized. The tool uses the Nanoblade ion column with an 8-nm 2-pA drill bit. Additionally, optimal secondary electron detection provides more accurate endpoint termination. Pricing for the P3X starts at $480,000. Schlumberger Industries, Pleasanton, Calif. Contact Michele Bernhardt at (408) 501-7145 or michele@san-jose.tt.slb.com.

Op amp family The MCP60X family consists of a group of 2.7-V single-supply operational amplifiers. These four devices offer a gain bandwidth product of 3 MHz with a typical operating current of 250 µA. The devices provide low-bias current, high-speed operation, high open-loop gain, and rail-to-rail output swing. The entire family is fully specified from 2.7 V to 5.5 V over the -40 degrees C to 85 degrees C temperature range. The common-mode input voltage range can be driven 0.3 V below ground. The op amps are unity gain stable and capable of driving capacitive loads. The MCP60X devices are available in single (MCP601), dual (MCP602), and quad (MCP604) amplifier options in PDIP, SOIC, and TSSOP packages. The MCP603 features a single amplifier with chip select. Pricing in 1,000-unit quantities is $0.40 each for the MCP601, $0.60 each for the MCP602, $0.45 each for the MCP603, and $0.85 each for the MCP604. Microchip Technology Inc., Chandler, Ariz. Contact (480) 786-7668 or www.microchip.com

Programmable logic tool Quartus 1999.06 supports multimillion gate designs created for Altera's Apex programmable logic architecture. On a benchmark suite of over 80 customer designs, ranging from 1,000 to 25,000 logic elements, the average timing-driven compilation time was less than 1 hour using 200-MHz Pentium-based computers. The Nstep compiler included in the software analyzes a given design and implements blocks of logic--look-up table logic, product term logic, or embedded system blocks--into the Apex Multicore architecture. Coresyn, a timing analysis tool that can handle multiclock and multicycle paths has been embedded in the Nstep compiler to enhance timing-driven compilation. Using the Quartus database, synthesis tools can access delay values at multiple points during the place-and-route process, improving timing estimation and providing feedback to synthesis engines as they optimize. The software runs under Windows NT, 95, and 98, Sun Solaris, and HP-UX. Subscription pricing is $2,000 per year, which includes both Quartus and Max+Plus II software. Altera Corp., San Jose. Contact (800) 925-8372 or www.altera.com.

FPGA design suite Desktop, Desktop Pro, and Desktop Open have added Verilog support to the three-vendor suite of FPGA development tools from Synplicity, Veribest, and Actel, with technical support provided by Actel. With the integration of Verilog into Desktop, users can now choose between VHDL or Verilog versions for design entry and simulation of Actel antifuse device designs of up to 50,000 gates. The Desktop Verilog license, which includes the hardware security key to run on any of the Desktop environments, is currently available for $1,995. Actel Corp., Sunnyvale, Calif. Contact (888) 992-2835 or www.actel.com.

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