Prototype & Debugging Kit The Easyflash-68HC11 development kit is a comprehensive prototyping and debugging environment for designers of 68HC11 MCU-based systems with external memory and logic provided by the Easyflash series PSD8XXF, PSD3XX, and PSD211R MCU support ICs. The Easyflash-68HC11 development environment functions to prototype and debug complete embedded systems designs, including the MCU code, the PSD's external logic and memory, external peripherals, memory mapping, and ISP capabilities. The Easyflash-68HC11 development kit consists of an MCU motherboard (68HC11 MCU included), a PSD daughter board (PSD813F1 included), a Cosmic CX68C11 compiler, Waferscale's Psdsoft 5.0 EDA software, and Waferscale's Flashlink Programmer for in-system programming via the PSD's JTAG interface. The Easyflash-68HC11 motherboard includes an 68HC11 MCU with two timer/counters and 128 bytes of RAM, an 8-bit asynchronous UART, a 9-pin RS232 interface, and a four-position dip switch to set the execution code source (flash, EEPROM, or SRAM). It also includes a debug RAM for break-point capability, a 2.4 x 2.5-inch prototype area that is connected to the MCU's address/data bus and control signals, expansion slots to expand the prototype area, a reset switch, and a 2 x 16 LCD display that echoes serial commands during debug and announces the results of ongoing tests such as page register ok and RAM ok. The prototype area can be used to add external devices such as a DAC or ADC. The expansion slots allow the addition of additional prototype boards. The Easyflash-68HC11 motherboard provides three power supply options: a holder for a 9V battery for prototyping portable applications, a standard transformer, or an external power supply to allow JTAG chaining or to accommodate user expansion. The development kit includes a PSD813F daughterboard populated with a 100-percent in-system-programmable PSD813F1. All daughterboards provide a jumper (JP1) to measure PSD current consumption. JTAG connectors on the PSD813F daughterboard provide access to the PSD813F's JTAG interface for JTAG programming of the PLD, MCU interface configuration, flash, and boot memories. During ISP, JTAG traffic can be observed by way of LEDs mounted on the daughterboard. PSDsoft 5.0 supports HDL-based logic design of the 3,000-gate on-chip CPLD, using MINC's AHDL. MCU interface configuration, I/O control, memory mapping, and the configuration of programmable functions are handled using radio buttons on pull-down menus and dialog boxes. PSDsoft 5.0 runs under Windows 95, 98, NT. Available now, the Easyflash-68HC11 development kit costs $399 for the motherboard with 68HC11 MCU, daughterboard with PSD813F1, PSDsoft 5.0 EDA tools, Cosmic CX6811 compiler, and Flashlink programmer. A second optional daughterboard for use with PSD3XX and PSD211R devices is available for an additional $65. Waferscale, Inc., Fremont, Calif. Contact www.waferscale.com.

Digital signal processor Based on open ZSP architecture, the LSI402Z device is the first DSP product to be fabricated in LSI Logic's G12 (0.18-ým drawn) technology. It consumes 40 percent less power than its predecessor (the LSI401Z), while adding enhanced peripherals and larger memory. The device provides 800 DSP MIPS at 200 MHz. The processor also includes two time-division-multiplexed (TDM) serial ports that support H.100/

H.110 for T1/E1 telecommunication lines. An eight-channel DMA controller enables support for multichannel VON system channel requirements with minimal external components. The LSI402Z is 100 percent code compatible with the LSI401Z, but provides expanded on-chip memory to support larger programs. The LSI402Z chip, available now, costs $60 in quantities of 1,000. LSI Logic Corp., Milpitas, Calif. Contact (408) 433-8000 or www.lsilogic.com